From: Nick Clifton Date: Tue, 19 May 2015 11:42:44 +0000 (+0000) Subject: re PR rtl-optimization/66156 ([msp430] wrong code generated with -O2 -mlarge (zero... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bdafd67926619844219607d658d0632d0eda313c;p=gcc.git re PR rtl-optimization/66156 ([msp430] wrong code generated with -O2 -mlarge (zero extension HI -> SI)) PR target/66156 * config/msp430/msp430.md (zero_extendhisi2): Add support for separate source and destination registers. From-SVN: r223354 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ed64b470784..2f90beaa2a9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-05-19 Nick Clifton + + PR target/66156 + * config/msp430/msp430.md (zero_extendhisi2): Add support for + separate source and destination registers. + 2015-05-19 Richard Biener PR tree-optimization/66165 @@ -32,7 +38,7 @@ * calls.c: Always define STACK_GROWS_DOWNWARD as 0 or 1. (mem_overlaps_already_clobbered_arg_p): Rewrite ifdef STACK_GROWS_DOWNWARD as normal if. - (expand_call): Likewise. + (expand_call): Likewise. 2015-05-19 Oleg Endo diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index 91742fc38b5..64fdc459b78 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -588,10 +588,12 @@ ;; patterns. Doing these manually allows for alternate optimization ;; paths. (define_insn "zero_extendhisi2" - [(set (match_operand:SI 0 "nonimmediate_operand" "=rm") - (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") + (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0,r")))] "msp430x" - "MOV.W\t#0,%H0" + "@ + MOV.W\t#0,%H0 + MOV.W\t%1,%L0 { MOV.W\t#0,%H0" ) (define_insn "zero_extendhisipsi2"