From: lkcl <lkcl@web>
Date: Wed, 4 Aug 2021 00:00:10 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~513
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bdc49a19e35d0efc491f85e6a5ec6384be25abb3;p=libreriscv.git

---

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 0cee13c33..b4024b4ac 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -113,9 +113,9 @@ the same instruction.  That would require two instructions.
 
 Form: SVL-Form (see [[isatables/fields.text]])
 
-| 0.5|6.10|11.15|16..21|22| 23...25  | 26.30 |31|  name   |
-| -- | -- | --- | ---- |--| -------- | ----- |--| ------- |
-|OPCD| RT | RA  | SVi  |/ | ms vs vf | 11110 |Rc| setvl   |
+| 0.5|6.10|11.15|16..21|22 | 23...25  | 26.30 |31|  name    |
+| -- | -- | --- | ---- |---| -------- | ----- |--| -------- |
+|OPCD| RT | MVL | SVi  |MVL| ms vs vf | 10110 |Rc| setmvlhi  |
 
 # Vertical First Mode