From: Jędrzej Boczar <jboczar@antmicro.com>
Date: Thu, 21 May 2020 14:19:28 +0000 (+0200)
Subject: litex_sim: load SPD data from files in hexdump format as printed in BIOS
X-Git-Tag: 24jan2021_ls180~276^2~2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bdc7eb5c48eae78b1e6bf30a09e0f726bbdd41a9;p=litex.git

litex_sim: load SPD data from files in hexdump format as printed in BIOS
---

diff --git a/litex/tools/litex_sim.py b/litex/tools/litex_sim.py
index 987681d3..e8fc25a9 100755
--- a/litex/tools/litex_sim.py
+++ b/litex/tools/litex_sim.py
@@ -19,6 +19,7 @@ from litex.soc.integration.builder import *
 from litex.soc.integration.soc import *
 
 from litedram import modules as litedram_modules
+from litedram.modules import parse_spd_hexdump
 from litedram.common import *
 from litedram.phy.model import SDRAMPHYModel
 
@@ -298,7 +299,7 @@ def main():
     parser.add_argument("--sdram-module",         default="MT48LC16M16",   help="Select SDRAM chip")
     parser.add_argument("--sdram-data-width",     default=32,              help="Set SDRAM chip data width")
     parser.add_argument("--sdram-init",           default=None,            help="SDRAM init file")
-    parser.add_argument("--sdram-from-spd-data",  default=None,            help="Generate SDRAM module based on SPD data from file")
+    parser.add_argument("--sdram-from-spd-dump",  default=None,            help="Generate SDRAM module based on data from SPD EEPROM dump")
     parser.add_argument("--sdram-verbosity",      default=0,               help="Set SDRAM checker verbosity")
     parser.add_argument("--with-ethernet",        action="store_true",     help="Enable Ethernet support")
     parser.add_argument("--with-etherbone",       action="store_true",     help="Enable Etherbone support")
@@ -337,9 +338,8 @@ def main():
         soc_kwargs["sdram_module"]             = args.sdram_module
         soc_kwargs["sdram_data_width"]         = int(args.sdram_data_width)
         soc_kwargs["sdram_verbosity"]          = int(args.sdram_verbosity)
-        if args.sdram_from_spd_data:
-            with open(args.sdram_from_spd_data, "rb") as f:
-                soc_kwargs["sdram_spd_data"] = [int(b) for b in f.read()]
+        if args.sdram_from_spd_dump:
+            soc_kwargs["sdram_spd_data"] = parse_spd_hexdump(args.sdram_from_spd_dump)
 
     if args.with_ethernet or args.with_etherbone:
         sim_config.add_module("ethernet", "eth", args={"interface": "tap0", "ip": args.remote_ip})