From: Samuel Pitoiset Date: Tue, 25 Jun 2019 11:56:22 +0000 (+0200) Subject: radv/gfx10: use the correct register for image descriptor dumping X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bdd8acde0211a6cbf947a24b652d41f901707a0e;p=mesa.git radv/gfx10: use the correct register for image descriptor dumping Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index 80d15599123..2f661c0208f 100644 --- a/src/amd/vulkan/radv_debug.c +++ b/src/amd/vulkan/radv_debug.c @@ -190,14 +190,17 @@ static void radv_dump_image_descriptor(enum chip_class chip_class, const uint32_t *desc, FILE *f) { + unsigned sq_img_rsrc_word0 = chip_class >= GFX10 ? R_00A000_SQ_IMG_RSRC_WORD0 + : R_008F10_SQ_IMG_RSRC_WORD0; + fprintf(f, COLOR_CYAN " Image:" COLOR_RESET "\n"); for (unsigned j = 0; j < 8; j++) - ac_dump_reg(f, chip_class, R_008F10_SQ_IMG_RSRC_WORD0 + j * 4, + ac_dump_reg(f, chip_class, sq_img_rsrc_word0 + j * 4, desc[j], 0xffffffff); fprintf(f, COLOR_CYAN " FMASK:" COLOR_RESET "\n"); for (unsigned j = 0; j < 8; j++) - ac_dump_reg(f, chip_class, R_008F10_SQ_IMG_RSRC_WORD0 + j * 4, + ac_dump_reg(f, chip_class, sq_img_rsrc_word0 + j * 4, desc[8 + j], 0xffffffff); }