From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Thu, 22 Mar 2012 10:58:31 +0000 (+0100)
Subject: nv50/ir/opt: check BB equality before instruction ordering in CSE
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=be161e66d6108e56d40c116a4ee12668d6b8d960;p=mesa.git

nv50/ir/opt: check BB equality before instruction ordering in CSE
---

diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
index 35ddca34b19..259bb5636c5 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
@@ -2096,7 +2096,7 @@ LocalCSE::visit(BasicBlock *bb)
             for (Value::UseIterator it = src->uses.begin();
                  it != src->uses.end(); ++it) {
                Instruction *ik = (*it)->getInsn();
-               if (ik && ik->serial < ir->serial && ik->bb == ir->bb)
+               if (ik && ik->bb == ir->bb && ik->serial < ir->serial)
                   if (tryReplace(&ir, ik))
                      break;
             }