From: Doug Evans <dje@gnu.org>
Date: Mon, 24 Mar 1997 21:11:18 +0000 (+0000)
Subject: Add m32r support.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=be20c0ad6eebcaf81d0b701b290a4ed1b80b7f4d;p=gcc.git

Add m32r support.

From-SVN: r13784
---

diff --git a/gcc/longlong.h b/gcc/longlong.h
index 65a7179f26a..02cc75ce966 100644
--- a/gcc/longlong.h
+++ b/gcc/longlong.h
@@ -406,6 +406,33 @@
     __w; })  
 #endif /* __i960__ */
 
+#if defined (__M32R__)
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  /* The cmp clears the condition bit.  */ \
+  __asm__ ("cmp %0,%0
+	addx %%5,%1
+	addx %%3,%0"							\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%0" ((USItype) (ah)),					\
+	     "r" ((USItype) (bh)),					\
+	     "%1" ((USItype) (al)),					\
+	     "r" ((USItype) (bl))					\
+	   : "cbit")
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  /* The cmp clears the condition bit.  */ \
+  __asm__ ("cmp %0,%0
+	subx %5,%1
+	subx %3,%0"							\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "0" ((USItype) (ah)),					\
+	     "r" ((USItype) (bh)),					\
+	     "1" ((USItype) (al)),					\
+	     "r" ((USItype) (bl))					\
+	   : "cbit")
+#endif /* __M32R__ */
+
 #if defined (__mc68000__)
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
   __asm__ ("add%.l %5,%1