From: Luke Kenneth Casson Leighton Date: Sat, 20 Jul 2019 05:45:12 +0000 (+0100) Subject: highlight weirdness X-Git-Tag: ls180-24jan2020~807 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=be3ced0520528dc38cb3a76839e0762058a53f6d;p=ieee754fpu.git highlight weirdness --- diff --git a/src/ieee754/fcvt/pipeline.py b/src/ieee754/fcvt/pipeline.py index 85432ca7..09606d40 100644 --- a/src/ieee754/fcvt/pipeline.py +++ b/src/ieee754/fcvt/pipeline.py @@ -112,11 +112,12 @@ class FPCVTIntToFloatMod(Elaboratable): if alternative: m.d.comb += z1.e.eq(msb.e_out-1) + mmsb = msb.m_out[-mz-1:] if mz == 16: # larger int to smaller FP (uint32/64 -> fp16 most likely) - m.d.comb += z1.m[ms-1:].eq(msb.m_out[-mz-1:]) + m.d.comb += z1.m[ms-1:].eq(mmsb) else: # 32? XXX weirdness... - m.d.comb += z1.m.eq(msb.m_out[-mz-1:]) + m.d.comb += z1.m.eq(mmsb) else: # smaller int to larger FP m.d.comb += z1.e.eq(msb.e_out)