From: David S. Miller <davem@pierdol.cobaltmicro.com>
Date: Sat, 29 Aug 1998 22:46:34 +0000 (+0000)
Subject: sparc.md (pic_lo_sum_di, [...]): Rename to movdi_lo_sum_pic and movdi_high_pic and... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=be3f1ff52c819ad4f1d08adcd8e116e61159594d;p=gcc.git

sparc.md (pic_lo_sum_di, [...]): Rename to movdi_lo_sum_pic and movdi_high_pic and make visible.

	* config/sparc/sparc.md (pic_lo_sum_di, pic_sethi_di): Rename to
	movdi_lo_sum_pic and movdi_high_pic and make visible.
	* config/sparc/sparc.c (legitimize_pic_address): For -fPIC,
	emit these when Pmode is not SImode.
	* config/sparc/linux64.h (SPARC_DEFAULT_CMODEL): Make CM_MEDLOW.

From-SVN: r22094
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0cab3e221f2..1e17e2b53bb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+Sat Aug 29 21:38:24 1998  David S. Miller  <davem@pierdol.cobaltmicro.com>
+
+	* config/sparc/sparc.md (pic_lo_sum_di, pic_sethi_di): Rename to
+	movdi_lo_sum_pic and movdi_high_pic and make visible.
+	* config/sparc/sparc.c (legitimize_pic_address): For -fPIC,
+	emit these when Pmode is not SImode.
+	* config/sparc/linux64.h (SPARC_DEFAULT_CMODEL): Make CM_MEDLOW.
+
 Sat Aug 29 14:59:32 1998  Mumit Khan  <khan@xraylith.wisc.edu>
 
 	* i386/cygwin32.h (ASM_OUTPUT_SECTION_NAME): Don't emit
diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
index 866d357c8cf..9c2df818a77 100644
--- a/gcc/config/sparc/linux64.h
+++ b/gcc/config/sparc/linux64.h
@@ -82,7 +82,7 @@ Boston, MA 02111-1307, USA.  */
 
 /* The default code model.  */
 #undef SPARC_DEFAULT_CMODEL
-#define SPARC_DEFAULT_CMODEL CM_MEDANY
+#define SPARC_DEFAULT_CMODEL CM_MEDLOW
 
 #undef WCHAR_TYPE
 #define WCHAR_TYPE "long int"
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 11c17f5206c..0e8b8042b7d 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -2449,8 +2449,16 @@ legitimize_pic_address (orig, mode, reg)
 	     won't get confused into thinking that these two instructions
 	     are loading in the true address of the symbol.  If in the
 	     future a PIC rtx exists, that should be used instead.  */
-	  emit_insn (gen_movsi_high_pic (temp_reg, orig));
-	  emit_insn (gen_movsi_lo_sum_pic (temp_reg, temp_reg, orig));
+	  if (Pmode == SImode)
+	    {
+	      emit_insn (gen_movsi_high_pic (temp_reg, orig));
+	      emit_insn (gen_movsi_lo_sum_pic (temp_reg, temp_reg, orig));
+	    }
+	  else
+	    {
+	      emit_insn (gen_movdi_high_pic (temp_reg, orig));
+	      emit_insn (gen_movdi_lo_sum_pic (temp_reg, temp_reg, orig));
+	    }
 	  address = temp_reg;
 	}
       else
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 6290a55d34d..f1ac5ce0a63 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -2405,7 +2405,7 @@
 ;; Sparc-v9 code model support insns.  See sparc_emit_set_symbolic_const64
 ;; in sparc.c to see what is going on here... PIC stuff comes first.
 
-(define_insn "*pic_lo_sum_di"
+(define_insn "movdi_lo_sum_pic"
   [(set (match_operand:DI 0 "register_operand" "=r")
         (lo_sum:DI (match_operand:DI 1 "register_operand" "r")
                    (unspec:DI [(match_operand:DI 2 "immediate_operand" "in")] 0)))]
@@ -2414,7 +2414,7 @@
   [(set_attr "type" "ialu")
    (set_attr "length" "1")])
 
-(define_insn "*pic_sethi_di"
+(define_insn "movdi_high_pic"
   [(set (match_operand:DI 0 "register_operand" "=r")
         (high:DI (unspec:DI [(match_operand 1 "" "")] 0)))]
   "TARGET_ARCH64 && flag_pic && check_pic (1)"