From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 10 Nov 2021 18:20:07 +0000 (+0000)
Subject: add fetch of MSR in LD/ST pipe_data
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=be9fc186001b75445309b4b0c486d8490e49b898;p=soc.git

add fetch of MSR in LD/ST pipe_data
---

diff --git a/src/soc/fu/ldst/pipe_data.py b/src/soc/fu/ldst/pipe_data.py
index c2d8a43c..fc0546a9 100644
--- a/src/soc/fu/ldst/pipe_data.py
+++ b/src/soc/fu/ldst/pipe_data.py
@@ -10,6 +10,7 @@ class LDSTInputData(FUBaseData):
                ('INT', 'rb', '0:63'), # RB/immediate
                ('INT', 'rc', '0:63'), # RC
                # XXX TODO, later ('XER', 'xer_so', '32') # XER bit 32: SO
+               ('STATE', 'msr', '0:63'),  # MSR
                ]
     def __init__(self, pspec):
         super().__init__(pspec, False)