From: Paul Berry Date: Sat, 3 Sep 2011 15:42:28 +0000 (-0700) Subject: i965: Remove two_side_color from brw_compute_vue_map(). X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=becd54eedb26ec9076e6f5f98f485861b3e13a90;p=mesa.git i965: Remove two_side_color from brw_compute_vue_map(). Since we now lay out the VUE the same way regardless of whether two-sided color is enabled, brw_compute_vue_map() no longer needs to know whether two-sided color is enabled. This allows the two-sided color flag to be removed from the clip, GS, and VS keys, so that fewer GPU programs need to be recompiled when turning two-sided color on and off. Reviewed-by: Eric Anholt --- diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 32c0778ff1f..2eb6044e22c 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -69,8 +69,7 @@ static void compile_clip_prog( struct brw_context *brw, c.func.single_program_flow = 1; c.key = *key; - brw_compute_vue_map(&c.vue_map, intel, c.key.nr_userclip, - c.key.do_twoside_color, c.key.attrs); + brw_compute_vue_map(&c.vue_map, intel, c.key.nr_userclip, c.key.attrs); /* nr_regs is the number of registers filled by reading data from the VUE. * This program accesses the entire VUE, so nr_regs needs to be the size of @@ -150,7 +149,6 @@ static void upload_clip_prog(struct brw_context *brw) /* _NEW_LIGHT */ key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT); key.pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION); - key.do_twoside_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); /* _NEW_TRANSFORM */ key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled); diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h index 97372849ef3..8647847c2a1 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.h +++ b/src/mesa/drivers/dri/i965/brw_clip.h @@ -55,8 +55,7 @@ struct brw_clip_prog_key { GLuint copy_bfc_cw:1; GLuint copy_bfc_ccw:1; GLuint clip_mode:3; - GLuint do_twoside_color:1; - GLuint pad0:10; + GLuint pad0:11; GLfloat offset_factor; GLfloat offset_units; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 8cb42adc450..6772029e33c 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -967,7 +967,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen); /* brw_vs.c */ void brw_compute_vue_map(struct brw_vue_map *vue_map, const struct intel_context *intel, int nr_userclip, - bool two_side_color, GLbitfield64 outputs_written); + GLbitfield64 outputs_written); /*====================================================================== * Inline conversion functions. These are better-typed than the diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index ddeb5bfd358..0a37485171e 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -64,8 +64,7 @@ static void compile_gs_prog( struct brw_context *brw, c.key = *key; /* The geometry shader needs to access the entire VUE. */ struct brw_vue_map vue_map; - brw_compute_vue_map(&vue_map, intel, c.key.nr_userclip, - c.key.do_twoside_color, c.key.attrs); + brw_compute_vue_map(&vue_map, intel, c.key.nr_userclip, c.key.attrs); c.nr_regs = (vue_map.num_slots + 1)/2; mem_ctx = NULL; @@ -152,7 +151,6 @@ static void populate_key( struct brw_context *brw, /* _NEW_LIGHT */ key->pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION); - key->do_twoside_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); if (key->primitive == GL_QUADS && ctx->Light.ShadeModel != GL_FLAT) { /* Provide consistent primitive order with brw_set_prim's * optimization of single quads to trifans. diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h index b369e7db4f6..d8637c8bb25 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.h +++ b/src/mesa/drivers/dri/i965/brw_gs.h @@ -45,8 +45,7 @@ struct brw_gs_prog_key { GLuint pv_first:1; GLuint need_gs_prog:1; GLuint nr_userclip:4; - GLuint do_twoside_color:1; - GLuint pad:21; + GLuint pad:22; }; struct brw_gs_compile { diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index e9cd020970e..4e0434addbf 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -63,8 +63,7 @@ static void compile_sf_prog( struct brw_context *brw, brw_init_compile(brw, &c.func, mem_ctx); c.key = *key; - brw_compute_vue_map(&c.vue_map, intel, c.key.nr_userclip, - c.key.do_twoside_color, c.key.attrs); + brw_compute_vue_map(&c.vue_map, intel, c.key.nr_userclip, c.key.attrs); c.urb_entry_read_offset = brw_sf_compute_urb_entry_read_offset(intel); c.nr_attr_regs = (c.vue_map.num_slots + 1)/2 - c.urb_entry_read_offset; c.nr_setup_regs = c.nr_attr_regs; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 1b251fd7c19..2cea90d0ff4 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1906,7 +1906,7 @@ vec4_visitor::emit_urb_writes() /* FINISHME: edgeflag */ brw_compute_vue_map(&c->vue_map, intel, c->key.nr_userclip, - c->key.two_side_color, c->prog_data.outputs_written); + c->prog_data.outputs_written); /* First mrf is the g0-based message header containing URB handles and such, * which is implied in VS_OPCODE_URB_WRITE. diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 8a7a3768b43..88564d337da 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -56,7 +56,7 @@ static inline void assign_vue_slot(struct brw_vue_map *vue_map, void brw_compute_vue_map(struct brw_vue_map *vue_map, const struct intel_context *intel, int nr_userclip, - bool two_side_color, GLbitfield64 outputs_written) + GLbitfield64 outputs_written) { int i; @@ -258,7 +258,6 @@ static void brw_upload_vs_prog(struct brw_context *brw) key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled); key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL || ctx->Polygon.BackMode != GL_FILL); - key.two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); /* _NEW_LIGHT | _NEW_BUFFERS */ key.clamp_vertex_color = ctx->Light._ClampVertexColor; diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h index c31869c59c9..28e6b428013 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.h +++ b/src/mesa/drivers/dri/i965/brw_vs.h @@ -48,7 +48,6 @@ struct brw_vs_prog_key { GLuint nr_userclip:4; GLuint copy_edgeflag:1; GLuint point_coord_replace:8; - GLuint two_side_color: 1; GLuint clamp_vertex_color:1; }; diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index bf2ad8d5a83..4f7a4422d76 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -326,7 +326,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) /* Allocate outputs. The non-position outputs go straight into message regs. */ brw_compute_vue_map(&c->vue_map, intel, c->key.nr_userclip, - c->key.two_side_color, c->prog_data.outputs_written); + c->prog_data.outputs_written); c->first_output = reg; first_reladdr_output = get_first_reladdr_output(&c->vp->program); diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c index 3dad4375988..ed49593b077 100644 --- a/src/mesa/drivers/dri/i965/gen6_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c @@ -127,8 +127,7 @@ upload_sf_state(struct brw_context *brw) urb_entry_read_offset = 1; nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled); - brw_compute_vue_map(&vue_map, intel, nr_userclip, two_side_color, - vs_outputs_written); + brw_compute_vue_map(&vue_map, intel, nr_userclip, vs_outputs_written); urb_entry_read_length = (vue_map.num_slots + 1)/2 - urb_entry_read_offset; if (urb_entry_read_length == 0) { /* Setting the URB entry read length to 0 causes undefined behavior, so diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c index 70ace297ce0..af98041c6a1 100644 --- a/src/mesa/drivers/dri/i965/gen7_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c @@ -50,8 +50,7 @@ upload_sbe_state(struct brw_context *brw) int two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); uint16_t attr_overrides[FRAG_ATTRIB_MAX]; - brw_compute_vue_map(&vue_map, intel, nr_userclip, two_side_color, - vs_outputs_written); + brw_compute_vue_map(&vue_map, intel, nr_userclip, vs_outputs_written); urb_entry_read_length = (vue_map.num_slots + 1)/2 - urb_entry_read_offset; if (urb_entry_read_length == 0) { /* Setting the URB entry read length to 0 causes undefined behavior, so