From: japm48 <japm48@users.noreply.github.com>
Date: Sun, 22 Jul 2018 20:29:31 +0000 (+0200)
Subject: fix basys3 example
X-Git-Tag: yosys-0.8~36^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=beedaa58561eb7cabf24e0d267beb77d5c78ef1d;p=yosys.git

fix basys3 example

Added `CONFIG_VOLTAGE` and `CFGBVS` to constraints file
to avoid warning `DRC 23-20`.

Added `open_hw` needed for programming.
---

diff --git a/examples/basys3/example.xdc b/examples/basys3/example.xdc
index c1fd0e925..8cdaa1996 100644
--- a/examples/basys3/example.xdc
+++ b/examples/basys3/example.xdc
@@ -19,3 +19,6 @@ set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN L1  } [get_ports {LD[15]}]
 
 create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports CLK]
 
+set_property CONFIG_VOLTAGE 3.3 [current_design]
+set_property CFGBVS VCCO [current_design]
+
diff --git a/examples/basys3/run_prog.tcl b/examples/basys3/run_prog.tcl
index d711af840..b078ad511 100644
--- a/examples/basys3/run_prog.tcl
+++ b/examples/basys3/run_prog.tcl
@@ -1,3 +1,4 @@
+open_hw
 connect_hw_server
 open_hw_target [lindex [get_hw_targets] 0]
 set_property PROGRAM.FILE example.bit [lindex [get_hw_devices] 0]