From: Michael Meissner <meissner@linux.vnet.ibm.com>
Date: Wed, 11 Mar 2015 16:57:41 +0000 (+0000)
Subject: re PR target/65242 (ICE (in gen_add2_insn, at optabs.c:4761) on powerpc64le-linux... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=befe199770ac909a81bd0f1d445e027cbd4eef50;p=gcc.git

re PR target/65242 (ICE (in gen_add2_insn, at optabs.c:4761) on powerpc64le-linux-gnu)

[gcc]
2015-03-09  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/65242
	* config/rs6000/rs6000.c (rs6000_preferred_reload_class): Do not
	allow reloads of PLUS in floating point/VSX registers.

[gcc/testsuite]
2015-03-09  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/65242
	* g++.dg/pr65242.C: New test.

From-SVN: r221350
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4adfa109dd7..144df6c8154 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-03-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/65242
+	* config/rs6000/rs6000.c (rs6000_preferred_reload_class): Do not
+	allow reloads of PLUS in floating point/VSX registers.
+
 2015-03-11  Junmo Park  <junmoz.park@samsung.com>
 
 	* config/arm/cortex-a57.md (cortex_a57_crypto_simple): Add crypto_sha256_fast.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 3171eef2323..31b46ea4c82 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -17645,8 +17645,10 @@ rs6000_preferred_reload_class (rtx x, enum reg_class rclass)
   machine_mode mode = GET_MODE (x);
   bool is_constant = CONSTANT_P (x);
 
-  /* Do VSX tests before handling traditional floaitng point registers.  */
-  if (TARGET_VSX && VSX_REG_CLASS_P (rclass))
+  /* For VSX, see if we should prefer FLOAT_REGS or ALTIVEC_REGS.  Do not allow
+     the reloading of address expressions using PLUS into floating point
+     registers.  */
+  if (TARGET_VSX && VSX_REG_CLASS_P (rclass) && GET_CODE (x) != PLUS)
     {
       if (is_constant)
 	{
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7253a53b239..cd4c9a4003a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-03-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/65242
+	* g++.dg/pr65242.C: New test.
+
 2015-03-11  Marat Zakirov  <m.zakirov@samsung.com>
 
 	* c-c++-common/asan/no-asan-check-glob.c: New test.
diff --git a/gcc/testsuite/g++.dg/pr65242.C b/gcc/testsuite/g++.dg/pr65242.C
new file mode 100644
index 00000000000..c1230565861
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr65242.C
@@ -0,0 +1,97 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O3" } */
+
+class A {
+public:
+  int m_fn1();
+};
+class B {
+public:
+  enum IOMode { reading };
+};
+class tn_file_buf_stream : B {
+public:
+  tn_file_buf_stream(IOMode);
+  ~tn_file_buf_stream();
+};
+class C {
+public:
+  int &operator[](int);
+};
+class D {
+public:
+  bool m_fn2();
+};
+class F {
+public:
+  int m_fn3(D &);
+};
+class G {
+public:
+  D bdt;
+};
+class ObjectType {
+public:
+  int id;
+  D weather;
+  struct H {
+    F terrainaccess;
+  };
+  H m_fn4();
+  struct {
+    A images;
+  } weatherPicture[];
+  ObjectType *m_fn5();
+  int m_fn6();
+} a;
+#pragma pack(1)
+class I {};
+class J {
+  J(I *);
+  I translationTableTMISSPart;
+  void m_fn8();
+  tn_file_buf_stream *MissFile;
+  void m_fn9();
+  virtual G *m_fn7(int, int);
+};
+int b, c, d, g;
+int e[5];
+short f;
+void J::m_fn9() {
+  int h;
+  C k;
+  for (; b;) {
+    int l = c, n = c & 1;
+    for (int m; d;) {
+      int o = 0;
+      for (int p = 0; p < 2 && !o; p++)
+        if (g)
+          for (int i; i < a.m_fn6(); i++) {
+            ObjectType *q = a.m_fn5();
+            for (int r = 0; r < 6; r++)
+              if (q->weather.m_fn2())
+                for (int j; j < q->weatherPicture[r].images.m_fn1(); j++)
+                  if (e[m]) {
+                    G *s = m_fn7(l, n);
+                    if (q->m_fn4().terrainaccess.m_fn3(s->bdt))
+                      g = o = 1;
+                  }
+          }
+      k[h++] = f;
+    }
+  }
+}
+
+void J::m_fn8() try {
+  tn_file_buf_stream t(B::reading);
+  MissFile = &t;
+  m_fn9();
+  J u(0);
+  u.m_fn8();
+}
+
+catch (int) {
+}