From: Jacob Lifshay Date: Thu, 23 Mar 2023 00:15:50 +0000 (-0700) Subject: fix: fmvtg. changes CR0, not CR1 X-Git-Tag: opf_rfc_ls001_v3~95 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bf12775cd69451fb6705e6dfb13a0f957e1e8b6c;p=libreriscv.git fix: fmvtg. changes CR0, not CR1 --- diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 4e8f40bd9..4fe3fab1f 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -314,7 +314,7 @@ operations. Special Registers altered: - CR1 (if Rc=1) + CR0 (if Rc=1) ### Assembly Aliases diff --git a/openpower/sv/rfc/ls006.mdwn b/openpower/sv/rfc/ls006.mdwn index 4bc744b0d..e7da40e32 100644 --- a/openpower/sv/rfc/ls006.mdwn +++ b/openpower/sv/rfc/ls006.mdwn @@ -153,7 +153,7 @@ operations. Special Registers altered: - CR1 (if Rc=1) + CR0 (if Rc=1) ### Assembly Aliases