From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 18 Jun 2019 09:28:15 +0000 (+0100)
Subject: whoops syntax error
X-Git-Tag: div_pipeline~1840
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bf14ef6580842012e132cb9d892cbaeb6176be5e;p=soc.git

whoops syntax error
---

diff --git a/src/experiment/compldst.py b/src/experiment/compldst.py
index 18acbff8..77ad39dd 100644
--- a/src/experiment/compldst.py
+++ b/src/experiment/compldst.py
@@ -215,7 +215,7 @@ class LDSTCompUnit(Elaboratable):
                 m.d.comb += self.alu.p_valid_i.eq(1) # so indicate valid
 
         # put the register directly onto the output bus on a go_write
-        with m.If((self.go_wr_i):
+        with m.If(self.go_wr_i):
             comb += self.data_o.eq(data_r)
 
         # put the register directly onto the address bus