From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 14 May 2020 19:04:46 +0000 (+0100)
Subject: add parity test
X-Git-Tag: div_pipeline~1221
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bf347be70b54315fe5f7f3dfd51c8e8978a3332c;p=soc.git

add parity test
---

diff --git a/src/soc/logical/test/test_pipe_caller.py b/src/soc/logical/test/test_pipe_caller.py
index eaff75d9..9fd92cc3 100644
--- a/src/soc/logical/test/test_pipe_caller.py
+++ b/src/soc/logical/test/test_pipe_caller.py
@@ -123,6 +123,16 @@ class LogicalTestCase(FHDLTestCase):
             initial_regs[1] = random.randint(0, (1<<64)-1)
             self.run_tst_program(Program(lst), initial_regs)
 
+    def test_parity(self):
+        insns = ["prtyw", "prtyd"]
+        for i in range(10):
+            choice = random.choice(insns)
+            lst = [f"{choice} 3, 1"]
+            print(lst)
+            initial_regs = [0] * 32
+            initial_regs[1] = random.randint(0, (1<<64)-1)
+            self.run_tst_program(Program(lst), initial_regs)
+
     def test_popcnt(self):
         insns = ["popcntb", "popcntw", "popcntd"]
         for i in range(10):