From: Miodrag Milanovic <mmicko@gmail.com>
Date: Wed, 20 Oct 2021 11:08:08 +0000 (+0200)
Subject: If verific have vhdl lib it is required by other libs
X-Git-Tag: yosys-0.11~34
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bf79ff5927d3b31faf0099870445e36211878096;p=yosys.git

If verific have vhdl lib it is required by other libs
---

diff --git a/Makefile b/Makefile
index 4140c16f9..d1795f813 100644
--- a/Makefile
+++ b/Makefile
@@ -504,6 +504,10 @@ VERIFIC_COMPONENTS ?= verilog database util containers hier_tree
 ifneq ($(DISABLE_VERIFIC_VHDL),1)
 VERIFIC_COMPONENTS += vhdl
 CXXFLAGS += -DVERIFIC_VHDL_SUPPORT
+else
+ifneq ($(wildcard $(VERIFIC_DIR)/vhdl),)
+VERIFIC_COMPONENTS += vhdl
+endif
 endif
 ifneq ($(DISABLE_VERIFIC_EXTENSIONS),1)
 VERIFIC_COMPONENTS += extensions