From: Jan Beulich <jbeulich@suse.com>
Date: Tue, 14 Jul 2020 08:43:38 +0000 (+0200)
Subject: x86/Intel: debug registers are named DRn
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bfbd943845684ac374c41797154d2c53cc338145;p=binutils-gdb.git

x86/Intel: debug registers are named DRn

%db<n> is an AT&T invention; the Intel documentation and MASM have only
ever specified DRn (in line with CRn and TRn). (In principle gas also
shouldn't accept the names in Intel mode, but at least for now I've kept
things as they are. Perhaps as a first step this should just be warned
about.)
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1bb4605c2e3..581e1691d29 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+	* testsuite/gas/i386/intel.s: Use dr<N> instead of db<N>.
+	* testsuite/gas/i386/intel-intel.d: Disambiguate name.
+	* testsuite/gas/i386/intel.d,
+	testsuite/gas/i386/opcode-intel.d: Adjust expectations.
+
 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 
 	* testsuite/gas/i386/prefix.d: Adjust expectations.
diff --git a/gas/testsuite/gas/i386/intel-intel.d b/gas/testsuite/gas/i386/intel-intel.d
index d9d9b8c7521..b2663dd4574 100644
--- a/gas/testsuite/gas/i386/intel-intel.d
+++ b/gas/testsuite/gas/i386/intel-intel.d
@@ -260,9 +260,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 09 +	wbinvd *
 [ 	]*[a-f0-9]+:	0f 0b +	ud2 *
 [ 	]*[a-f0-9]+:	0f 20 d0 +	mov    eax,cr2
-[ 	]*[a-f0-9]+:	0f 21 d0 +	mov    eax,db2
+[ 	]*[a-f0-9]+:	0f 21 d0 +	mov    eax,dr2
 [ 	]*[a-f0-9]+:	0f 22 d0 +	mov    cr2,eax
-[ 	]*[a-f0-9]+:	0f 23 d0 +	mov    db2,eax
+[ 	]*[a-f0-9]+:	0f 23 d0 +	mov    dr2,eax
 [ 	]*[a-f0-9]+:	0f 24 d0 +	mov    eax,tr2
 [ 	]*[a-f0-9]+:	0f 26 d0 +	mov    tr2,eax
 [ 	]*[a-f0-9]+:	0f 30 +	wrmsr *
diff --git a/gas/testsuite/gas/i386/intel.d b/gas/testsuite/gas/i386/intel.d
index 309d264a092..c2c055121c4 100644
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -1,6 +1,6 @@
 #as: -J
 #objdump: -dw
-#name: i386 intel
+#name: i386 intel (AT&T disassembly)
 #warning_output: intel.e
 
 .*: +file format .*
diff --git a/gas/testsuite/gas/i386/intel.s b/gas/testsuite/gas/i386/intel.s
index 19c5eeac515..70fcf1c7f6f 100644
--- a/gas/testsuite/gas/i386/intel.s
+++ b/gas/testsuite/gas/i386/intel.s
@@ -252,9 +252,9 @@ foo:
  wbinvd
  ud2a
  mov    eax, cr2
- mov    eax, db2
+ mov    eax, dr2
  mov    cr2, eax
- mov    db2, eax
+ mov    dr2, eax
  mov    eax, tr2
  mov    tr2, eax
  wrmsr
diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
index 434b0e39701..68e1e8810e6 100644
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -257,9 +257,9 @@ Disassembly of section .text:
  *[0-9a-f]+:	0f 09[ 	]+wbinvd[ 	]*
  *[0-9a-f]+:	0f 0b[ 	]+ud2[ 	]*
  *[0-9a-f]+:	0f 20 d0[ 	]+mov[ 	]+eax,cr2
- *[0-9a-f]+:	0f 21 d0[ 	]+mov[ 	]+eax,db2
+ *[0-9a-f]+:	0f 21 d0[ 	]+mov[ 	]+eax,dr2
  *[0-9a-f]+:	0f 22 d0[ 	]+mov[ 	]+cr2,eax
- *[0-9a-f]+:	0f 23 d0[ 	]+mov[ 	]+db2,eax
+ *[0-9a-f]+:	0f 23 d0[ 	]+mov[ 	]+dr2,eax
  *[0-9a-f]+:	0f 24 d0[ 	]+mov[ 	]+eax,tr2
  *[0-9a-f]+:	0f 26 d0[ 	]+mov[ 	]+tr2,eax
  *[0-9a-f]+:	0f 30[ 	]+wrmsr[ 	]*
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4cc50874ff5..3a38bb2853f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+	* i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
+
 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 
 	* i386-dis.c (OP_R, Rm): Delete.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 9c45da2c4a1..a6cc01381be 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12787,7 +12787,7 @@ OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
   else
     add = 0;
   if (intel_syntax)
-    sprintf (scratchbuf, "db%d", modrm.reg + add);
+    sprintf (scratchbuf, "dr%d", modrm.reg + add);
   else
     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
   oappend (scratchbuf);