From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 27 Jun 2012 21:09:51 +0000 (+0000)
Subject: radeon/llvm: Expand UDIV and UREM nodes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c01199dfc0d30ad4c20cc4a2ebe3cdcbc74debb6;p=mesa.git

radeon/llvm: Expand UDIV and UREM nodes
---

diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
index 9d076bdf568..544de0fa312 100644
--- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
@@ -33,8 +33,10 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
   setOperationAction(ISD::FEXP2,  MVT::f32, Legal);
   setOperationAction(ISD::FRINT,  MVT::f32, Legal);
 
-  setOperationAction(ISD::UDIV, MVT::i32, Custom);
+
+  setOperationAction(ISD::UDIV, MVT::i32, Expand);
   setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
+  setOperationAction(ISD::UREM, MVT::i32, Expand);
 }
 
 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
@@ -44,9 +46,6 @@ SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
   default: return AMDILTargetLowering::LowerOperation(Op, DAG);
   case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
   case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
-  case ISD::UDIV:
-    return DAG.getNode(ISD::UDIVREM, Op.getDebugLoc(), Op.getValueType(),
-                       Op.getOperand(0), Op.getOperand(1)).getValue(0);
   case ISD::UDIVREM: return LowerUDIVREM(Op, DAG);
   }
 }