From: Luke Kenneth Casson Leighton Date: Thu, 24 Dec 2020 15:19:01 +0000 (+0000) Subject: corrections to sv_analysis svp64 tables X-Git-Tag: convert-csv-opcode-to-binary~948 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c029405d557903b03aae70aca899533691825124;p=libreriscv.git corrections to sv_analysis svp64 tables --- diff --git a/openpower/opcode_regs_deduped.mdwn b/openpower/opcode_regs_deduped.mdwn index 43087072f..a1deafce9 100644 --- a/openpower/opcode_regs_deduped.mdwn +++ b/openpower/opcode_regs_deduped.mdwn @@ -689,27 +689,27 @@ lhaux | 2P | EXTRA2 | d:RT | d:RA | s:RB | | RA_OR_ZERO | RB | NONE | RT | NONE [[!table data=""" insn | Ptype | Etype | 0 | 1 | 2 | 3 | -stdx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stwx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stbx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -sthx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stdbrx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stwbrx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stwcix | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -sthbrx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -sthcix | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stbcix | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | -stdcix | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stdx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stwx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stbx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +sthx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stdbrx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stwbrx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stwcix | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +sthbrx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +sthcix | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stbcix | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | +stdcix | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | NONE | """]] ## LDST-3R-CRo (LDSTRM-2P-3S) [[!table data=""" insn | Ptype | Etype | 0 | 1 | 2 | 3 | -stwcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | -stdcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | -stbcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | -sthcx | 2P | EXTRA2 | s:RS,d:CR0 | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +stwcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +stdcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +stbcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | +sthcx | 2P | EXTRA2 | s:RS | s:RA | s:RB | | RA_OR_ZERO | RB | RS | NONE | NONE | CR0 | """]] ## LDST-3R-1W (LDSTRM-2P-2S1D) diff --git a/openpower/sv_analysis.py b/openpower/sv_analysis.py index 395ad05ad..24b26dab9 100644 --- a/openpower/sv_analysis.py +++ b/openpower/sv_analysis.py @@ -403,7 +403,7 @@ def process_csvs(): elif value == 'LDSTRM-2P-3S': res['Etype'] = 'EXTRA2' # RM EXTRA2 type - res['0'] = 's:RS,d:CR0' # RS: Rsrc1_EXTRA2 CR0: dest + res['0'] = 's:RS' # RS: Rsrc1_EXTRA2 CR0: dest res['1'] = 's:RA' # RA: Rsrc2_EXTRA2 res['2'] = 's:RB' # RA: Rsrc3_EXTRA2