From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Thu, 21 Jun 2018 08:53:37 +0000 (+0100)
Subject: cpu: Fix bug introduced by RequestPtr type change
X-Git-Tag: v19.0.0.0~2035
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c03e7b3d221a927ceda6fdb7dd65ccd1a0df1945;p=gem5.git

cpu: Fix bug introduced by RequestPtr type change

Missing buffer allocation in mwaitAtomic.

Change-Id: Ifccb6df2427df8b0daac5ee6a99e5cca0b20825e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11469
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
---

diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 1a497db9a..878e65551 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -318,7 +318,8 @@ BaseCPU::mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseTLB *dtb)
     assert(tid < numThreads);
     AddressMonitor &monitor = addressMonitor[tid];
 
-    RequestPtr req;
+    RequestPtr req = std::make_shared<Request>();
+
     Addr addr = monitor.vAddr;
     int block_size = cacheLineSize();
     uint64_t mask = ~((uint64_t)(block_size - 1));