From: Nicolai Hähnle <nicolai.haehnle@amd.com>
Date: Wed, 15 Nov 2017 19:50:19 +0000 (+0100)
Subject: radeonsi/gfx10: implement vertex format changes
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c049a6f8954d32fd52eee062906650351e7e4864;p=mesa.git

radeonsi/gfx10: implement vertex format changes

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
---

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index b6be087b871..d27cf9f2824 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1167,11 +1167,20 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
 		}
 		assert(num_records >= 0 && num_records <= UINT_MAX);
 
+		uint32_t rsrc_word3 = velems->rsrc_word3[i];
+
+		/* OOB_SELECT chooses the out-of-bounds check:
+		 *  - 1: index >= NUM_RECORDS (Structured)
+		 *  - 3: offset >= NUM_RECORDS (Raw)
+		 */
+		if (sctx->chip_class >= GFX10)
+			rsrc_word3 |= S_008F0C_OOB_SELECT(vb->stride ? 1 : 3);
+
 		desc[0] = va;
 		desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
 			  S_008F04_STRIDE(vb->stride);
 		desc[2] = num_records;
-		desc[3] = velems->rsrc_word3[i];
+		desc[3] = rsrc_word3;
 
 		if (first_vb_use_mask & (1 << i)) {
 			radeon_add_to_buffer_list(sctx, sctx->gfx_cs,
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index e8530d3f6e5..0f88ec1cca0 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4871,11 +4871,19 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
 				   S_008F0C_DST_SEL_Z(si_map_swizzle(desc->swizzle[2])) |
 				   S_008F0C_DST_SEL_W(si_map_swizzle(desc->swizzle[3]));
 
-		unsigned data_format, num_format;
-		data_format = si_translate_buffer_dataformat(ctx->screen, desc, first_non_void);
-		num_format = si_translate_buffer_numformat(ctx->screen, desc, first_non_void);
-		v->rsrc_word3[i] |= S_008F0C_NUM_FORMAT(num_format) |
-				    S_008F0C_DATA_FORMAT(data_format);
+		if (sscreen->info.chip_class >= GFX10) {
+			const struct gfx10_format *fmt =
+				&gfx10_format_table[elements[i].src_format];
+			assert(fmt->img_format != 0 && fmt->img_format < 128);
+			v->rsrc_word3[i] |= S_008F0C_FORMAT(fmt->img_format) |
+					    S_008F0C_RESOURCE_LEVEL(1);
+		} else {
+			unsigned data_format, num_format;
+			data_format = si_translate_buffer_dataformat(ctx->screen, desc, first_non_void);
+			num_format = si_translate_buffer_numformat(ctx->screen, desc, first_non_void);
+			v->rsrc_word3[i] |= S_008F0C_NUM_FORMAT(num_format) |
+					    S_008F0C_DATA_FORMAT(data_format);
+		}
 	}
 
 	if (v->instance_divisor_is_fetched) {