From: Sebastien Bourdeauducq Date: Tue, 12 Mar 2013 15:14:13 +0000 (+0100) Subject: generic_platform: implicit get_fragment X-Git-Tag: 24jan2021_ls180~2099^2~443^2~58 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c06a821452be8b331548641d5adc82df9891d0e8;p=litex.git generic_platform: implicit get_fragment --- diff --git a/mibuild/generic_platform.py b/mibuild/generic_platform.py index ca5d9bd0..89360bc4 100644 --- a/mibuild/generic_platform.py +++ b/mibuild/generic_platform.py @@ -198,6 +198,8 @@ class GenericPlatform: self.add_source(os.path.join(root, filename), language) def get_verilog(self, fragment, clock_domains=None, **kwargs): + if not isinstance(fragment, Fragment): + fragment = fragment.get_fragment() # We may create a temporary clock/reset generator that would request pins. # Save the constraint manager state so that such pin requests disappear # at the end of this function.