From: Jan Beulich Date: Fri, 1 Jul 2016 07:01:41 +0000 (+0200) Subject: x86: allow suffix-less movzw and 64-bit movzb X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c07315e0c610e0e3317b4c02266f81793df253d2;p=binutils-gdb.git x86: allow suffix-less movzw and 64-bit movzb ... just like is already the case for 16- and 32-bit movzb: I can't see why omitting suffixes on this (and movs{b,w,l}) is not allowed, when it is allowed for all other instructions where the suffix is redundant with (one of) the operands. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index a654185b175..db25ef2e73d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2016-07-01 Jan Beulich + + * testsuite/gas/i386/movz.s: New. + * testsuite/gas/i386/movz32.d: New. + * testsuite/gas/i386/movz64.d: New. + * testsuite/gas/i386/i386.exp: Run new tests. + 2016-07-01 Jan Beulich * config/tc-i386.c (struct _i386_insn): New field memop1_string. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 393910c1753..871004bcb1c 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -59,6 +59,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "amd" run_dump_test "katmai" run_dump_test "jump" + run_dump_test "movz32" run_dump_test "relax-1" run_dump_test "relax-2" run_dump_test "ssemmx2" @@ -507,6 +508,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-segovr" run_list_test "x86-64-inval-seg" "-al" run_dump_test "x86-64-branch" + run_dump_test "movz64" run_dump_test "x86-64-relax-1" run_dump_test "svme64" run_dump_test "x86-64-amdfam10" diff --git a/gas/testsuite/gas/i386/movz.s b/gas/testsuite/gas/i386/movz.s new file mode 100644 index 00000000000..108be75d0df --- /dev/null +++ b/gas/testsuite/gas/i386/movz.s @@ -0,0 +1,33 @@ + .text +movz: + movzb %al,%ax + movzb (%eax),%ax + movzb %al,%eax + movzb (%eax),%eax +.ifdef x86_64 + movzb %al,%rax + movzb (%rax),%rax +.endif + + movzbw %al,%ax + movzbw (%eax),%ax + movzbl %al,%eax + movzbl (%eax),%eax +.ifdef x86_64 + movzbq %al,%rax + movzbq (%rax),%rax +.endif + + movzw %ax,%eax + movzw (%eax),%eax +.ifdef x86_64 + movzw %ax,%rax + movzw (%rax),%rax +.endif + + movzwl %ax,%eax + movzwl (%eax),%eax +.ifdef x86_64 + movzwq %ax,%rax + movzwq (%rax),%rax +.endif diff --git a/gas/testsuite/gas/i386/movz32.d b/gas/testsuite/gas/i386/movz32.d new file mode 100644 index 00000000000..592baa05ced --- /dev/null +++ b/gas/testsuite/gas/i386/movz32.d @@ -0,0 +1,22 @@ +#objdump: -dw +#source: movz.s +#name: x86 mov with zero-extend (32-bit object) + +.*: +file format .* + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f b6 c0 * movzbw %al,%ax +[ ]*[a-f0-9]+: 66 0f b6 00 * movzbw \(%eax\),%ax +[ ]*[a-f0-9]+: 0f b6 c0 * movzbl %al,%eax +[ ]*[a-f0-9]+: 0f b6 00 * movzbl \(%eax\),%eax +[ ]*[a-f0-9]+: 66 0f b6 c0 * movzbw %al,%ax +[ ]*[a-f0-9]+: 66 0f b6 00 * movzbw \(%eax\),%ax +[ ]*[a-f0-9]+: 0f b6 c0 * movzbl %al,%eax +[ ]*[a-f0-9]+: 0f b6 00 * movzbl \(%eax\),%eax +[ ]*[a-f0-9]+: 0f b7 c0 * movzwl %ax,%eax +[ ]*[a-f0-9]+: 0f b7 00 * movzwl \(%eax\),%eax +[ ]*[a-f0-9]+: 0f b7 c0 * movzwl %ax,%eax +[ ]*[a-f0-9]+: 0f b7 00 * movzwl \(%eax\),%eax +#pass diff --git a/gas/testsuite/gas/i386/movz64.d b/gas/testsuite/gas/i386/movz64.d new file mode 100644 index 00000000000..d8ec2ba5dc9 --- /dev/null +++ b/gas/testsuite/gas/i386/movz64.d @@ -0,0 +1,30 @@ +#objdump: -dw +#source: movz.s +#name: x86 mov with zero-extend (64-bit object) + +.*: +file format .* + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f b6 c0 * movzbw %al,%ax +[ ]*[a-f0-9]+: 67 66 0f b6 00 * movzbw \(%eax\),%ax +[ ]*[a-f0-9]+: 0f b6 c0 * movzbl %al,%eax +[ ]*[a-f0-9]+: 67 0f b6 00 * movzbl \(%eax\),%eax +[ ]*[a-f0-9]+: 48 0f b6 c0 * movzbq %al,%rax +[ ]*[a-f0-9]+: 48 0f b6 00 * movzbq \(%rax\),%rax +[ ]*[a-f0-9]+: 66 0f b6 c0 * movzbw %al,%ax +[ ]*[a-f0-9]+: 67 66 0f b6 00 * movzbw \(%eax\),%ax +[ ]*[a-f0-9]+: 0f b6 c0 * movzbl %al,%eax +[ ]*[a-f0-9]+: 67 0f b6 00 * movzbl \(%eax\),%eax +[ ]*[a-f0-9]+: 48 0f b6 c0 * movzbq %al,%rax +[ ]*[a-f0-9]+: 48 0f b6 00 * movzbq \(%rax\),%rax +[ ]*[a-f0-9]+: 0f b7 c0 * movzwl %ax,%eax +[ ]*[a-f0-9]+: 67 0f b7 00 * movzwl \(%eax\),%eax +[ ]*[a-f0-9]+: 48 0f b7 c0 * movzwq %ax,%rax +[ ]*[a-f0-9]+: 48 0f b7 00 * movzwq \(%rax\),%rax +[ ]*[a-f0-9]+: 0f b7 c0 * movzwl %ax,%eax +[ ]*[a-f0-9]+: 67 0f b7 00 * movzwl \(%eax\),%eax +[ ]*[a-f0-9]+: 48 0f b7 c0 * movzwq %ax,%rax +[ ]*[a-f0-9]+: 48 0f b7 00 * movzwq \(%rax\),%rax +#pass diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4ab7995b30a..109cb7f6956 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2016-07-01 Jan Beulich + + * i386-opc.tbl (movzbl, movzbw, movzbq, movzwl, movzwq): Remove. + (movzb): Adjust to cover all permitted suffixes. + (movzw): New. + * i386-tbl.h: Re-generate. + 2016-07-01 Jan Beulich * i386-opc.tbl (jmp): Remove Disp32S from non-64-bit variant. diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index bd97c0e5df4..161bc082329 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -74,18 +74,9 @@ movsx, 2, 0xfbf, None, 2, Cpu386, Modrm|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf movsx, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|IntelSyntax, { Reg32|Dword|BaseIndex|Disp8|Disp32|Disp32S, Reg64 } movsxd, 2, 0x63, None, 1, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg32|Dword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S, Reg64 } -// Move with zero extend. We can't remove "movzb" since existing -// assembly codes may use it. -movzb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } -// "movzbl" & "movzbw" should not be unified into "movzb" for -// consistency with the sign extending moves above. -movzbl, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 } -movzbw, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16 } -movzwl, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 } -// These instructions are not particulary useful, since the zero extend -// 32->64 is implicit, but we can encode them. -movzbq, 2, 0xfb6, None, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp32|Disp32S, Reg64 } -movzwq, 2, 0xfb7, None, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg16|Word|Unspecified|BaseIndex|Disp8|Disp32|Disp32S, Reg64 } +// Move with zero extend. +movzb, 2, 0xfb6, None, 2, Cpu386, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } +movzw, 2, 0xfb7, None, 2, Cpu386, Modrm|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg16|Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 } // Intel Syntax next 2 insns (the 64-bit variants are not particulary // useful since the zero extend 32->64 is implicit, but we can encode them). movzx, 2, 0xfb6, None, 2, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Reg8|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 1f1a4b42689..c1a8ed85f3b 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -605,7 +605,7 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, - 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -614,84 +614,20 @@ const insn_template i386_optab[] = { { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "movzbl", 2, 0xfb6, None, 2, - { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0 }, - { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "movzbw", 2, 0xfb6, None, 2, + { "movzw", 2, 0xfb7, None, 2, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0 }, - { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, - { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "movzwl", 2, 0xfb7, None, 2, - { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, - { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "movzbq", 2, 0xfb6, None, 2, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0 }, - { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "movzwq", 2, 0xfb7, None, 2, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, - 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0 }, - { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movzx", 2, 0xfb6, None, 2,