From: Yvan Roux Date: Tue, 14 Apr 2015 17:21:54 +0000 (+0000) Subject: re PR target/65729 (ICE (in prohibited_class_reg_set_mode_p, at lra-constraints.c... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c07ad89a044d379b5048441d0792c7a296502b2a;p=gcc.git re PR target/65729 (ICE (in prohibited_class_reg_set_mode_p, at lra-constraints.c) on arm-linux-gnueabihf) gcc/ 2015-04-14 Yvan Roux PR target/65729 * lra-constraints.c (prohibited_class_reg_set_mode_p): Restore and fix the assertiion. gcc/testsuite/ 2015-04-14 Yvan Roux PR target/65729 * gcc.target/arm/pr65729.c: New test. From-SVN: r222101 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6e1f1450971..d4755f91b42 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-04-14 Yvan Roux + + PR target/65729 + * lra-constraints.c (prohibited_class_reg_set_mode_p): Restore and fix + the assertiion. + 2015-04-14 Uros Bizjak * config/i386/i386.h (LEGACY_INT_REG_P): New define. diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 7353e7c2c7d..90f351b9a0f 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1656,8 +1656,7 @@ prohibited_class_reg_set_mode_p (enum reg_class rclass, { HARD_REG_SET temp; - // ??? Is this assert right - // lra_assert (hard_reg_set_subset_p (set, reg_class_contents[rclass])); + lra_assert (hard_reg_set_subset_p (reg_class_contents[rclass], set)); COPY_HARD_REG_SET (temp, set); AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs); return (hard_reg_set_subset_p diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6d2d5de1231..2f6ef32fe3d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-04-14 Yvan Roux + + PR target/65729 + * gcc.target/arm/pr65729.c: New test. + 2015-04-14 Richard Biener PR tree-optimization/65758 diff --git a/gcc/testsuite/gcc.target/arm/pr65729.c b/gcc/testsuite/gcc.target/arm/pr65729.c new file mode 100644 index 00000000000..0d7e3c1c036 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr65729.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16" } */ + +int foo (void) +{ + double x = 0.0; + asm volatile ("" : "+gw" (x)); + return x; +}