From: Yvan Roux Date: Wed, 12 Aug 2015 13:27:41 +0000 (+0000) Subject: re PR target/67127 ([ARM] Avoiding odd-number ldrd/strd in movdi introduced a regress... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c0ba5a8b0cd64aa0d1024756bdf2c095199f289c;p=gcc.git re PR target/67127 ([ARM] Avoiding odd-number ldrd/strd in movdi introduced a regression on armeb-linux-gnueabihf) 2015-08-12 Yvan Roux PR target/67127 * config/arm/arm.md (movdi): Restrict illegitimate ldrd/strd checking to ARM core registers. From-SVN: r226811 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3869f671cd3..06650098dc9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-08-12 Yvan Roux + + PR target/67127 + * config/arm/arm.md (movdi): Restrict illegitimate ldrd/strd checking + to ARM core registers. + 2015-08-12 Nathan Sidwell * tree-vrp.c (simplify_min_or_max_using_ranges): New. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 817860dda02..288bbb9f836 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -5519,7 +5519,7 @@ if (!REG_P (operands[0])) operands[1] = force_reg (DImode, operands[1]); } - if (REG_P (operands[0]) && REGNO (operands[0]) < FIRST_VIRTUAL_REGISTER + if (REG_P (operands[0]) && REGNO (operands[0]) <= LAST_ARM_REGNUM && !HARD_REGNO_MODE_OK (REGNO (operands[0]), DImode)) { /* Avoid LDRD's into an odd-numbered register pair in ARM state @@ -5538,7 +5538,7 @@ gen_highpart (SImode, operands[1])); DONE; } - else if (REG_P (operands[1]) && REGNO (operands[1]) < FIRST_VIRTUAL_REGISTER + else if (REG_P (operands[1]) && REGNO (operands[1]) <= LAST_ARM_REGNUM && !HARD_REGNO_MODE_OK (REGNO (operands[1]), DImode)) { /* Avoid STRD's from an odd-numbered register pair in ARM state