From: Jacob Lifshay <programmerjake@gmail.com>
Date: Fri, 10 Dec 2021 20:30:12 +0000 (-0800)
Subject: add .gitignore to ignore the generated vhdl
X-Git-Tag: sv_maxu_works-initial~642
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c0ca89a1d98076b4080059c570bcc7433518ca7a;p=openpower-isa.git

add .gitignore to ignore the generated vhdl
---

diff --git a/openpower/isatables/.gitignore b/openpower/isatables/.gitignore
new file mode 100644
index 00000000..099523fe
--- /dev/null
+++ b/openpower/isatables/.gitignore
@@ -0,0 +1 @@
+/sv_decode.vhdl
\ No newline at end of file