From: Florent Kermarrec Date: Tue, 18 Jun 2019 07:44:09 +0000 (+0200) Subject: cpu/rocket: update submodule X-Git-Tag: 24jan2021_ls180~1159 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c0df9e08236697bad334b47dc8d6589420e37125;p=litex.git cpu/rocket: update submodule --- diff --git a/litex/soc/cores/cpu/rocket/verilog b/litex/soc/cores/cpu/rocket/verilog index bcb12b02..b17b6984 160000 --- a/litex/soc/cores/cpu/rocket/verilog +++ b/litex/soc/cores/cpu/rocket/verilog @@ -1 +1 @@ -Subproject commit bcb12b0233b050dddef8d9c69bbf590d10428647 +Subproject commit b17b6984b9b7b0d0c259306ba94187abae7f37f5