From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Tue, 26 Mar 2013 03:04:09 +0000 (-0700)
Subject: ignore host writes to fromhost if old value not 0
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c0f8506da03014ea5cc976286b329ff57a1162f7;p=riscv-isa-sim.git

ignore host writes to fromhost if old value not 0
---

diff --git a/riscv/htif.cc b/riscv/htif.cc
index 64ef40a..438d862 100644
--- a/riscv/htif.cc
+++ b/riscv/htif.cc
@@ -65,32 +65,32 @@ void htif_isasim_t::tick_once()
 
       if (coreid == 0xFFFFF) // system control register space
       {
-        uint64_t pcr = sim->get_scr(regno);
-        send(&pcr, sizeof(pcr));
+        uint64_t scr = sim->get_scr(regno);
+        send(&scr, sizeof(scr));
         break;
       }
 
       assert(coreid < sim->num_cores());
-      uint64_t pcr = sim->procs[coreid]->get_pcr(regno);
-      send(&pcr, sizeof(pcr));
+      uint64_t old_val = sim->procs[coreid]->get_pcr(regno);
+      send(&old_val, sizeof(old_val));
 
       if (regno == PCR_TOHOST)
           sim->procs[coreid]->tohost = 0;
 
       if (hdr.cmd == HTIF_CMD_WRITE_CONTROL_REG)
       {
-        uint64_t val;
-        memcpy(&val, p.get_payload(), sizeof(val));
+        uint64_t new_val;
+        memcpy(&new_val, p.get_payload(), sizeof(new_val));
         if (regno == PCR_RESET)
         {
-          if (reset && !(val & 1))
+          if (reset && !(new_val & 1))
             reset = false;
-          sim->procs[coreid]->reset(val & 1);
+          sim->procs[coreid]->reset(new_val & 1);
         }
+        else if (regno == PCR_FROMHOST && old_val != 0)
+          ; // ignore host writes to fromhost if target hasn't yet consumed
         else
-        {
-          sim->procs[coreid]->set_pcr(regno, val);
-        }
+          sim->procs[coreid]->set_pcr(regno, new_val);
       }
       break;
     }