From: lkcl Date: Fri, 27 May 2022 08:47:09 +0000 (+0100) Subject: p X-Git-Tag: opf_rfc_ls005_v1~2070 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c19cf122d245bcbcf7c48188db23df4917149b24;p=libreriscv.git p --- diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn new file mode 100644 index 000000000..6d1b0e51e --- /dev/null +++ b/openpower/sv/svp64_quirks.mdwn @@ -0,0 +1,13 @@ +# The Rules + +SVP64 is designed around these fundamental and inviolate principles: + +1. There are no actual Vector instructions: Scalar instructions + are the sole exclusive bedrock. +2. A hardware-level for-loop makes vector elements synonymous + with scalar instructions (the suffix) + +That said, there are a few exceptional places where these rules get +bent, and this page tracks them. + +# CR weird instructions