From: Jan Beulich Date: Fri, 28 Jun 2019 08:46:56 +0000 (+0000) Subject: x86: fix CVT{,T}PD2PI insns X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c1a106c222804416897c53f3c5dc8f028137151e;p=gcc.git x86: fix CVT{,T}PD2PI insns With just an "m" constraint misaligned memory operands won't be forced into a register, and hence cause #GP. So far this was guaranteed only in the case that CVT{,T}PD2DQ were chosen (which looks to be the case on x86-64 only). Switch the second alternative to Bm and also replace nonimmediate_operand by vector_operand. From-SVN: r272780 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 898b5a1d10c..35c5163da27 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-06-28 Jan Beulich + + * config/i386/sse.md (sse2_cvtpd2pi, sse2_cvttpd2pi): Use + vector_operand plus, on both alternatives, "Bm" constraint. + 2019-06-28 Dennis Zhang * config/arm/arm.md: Remove redundant constraints from diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 8b4f6c185d0..154681786e0 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -5505,7 +5505,7 @@ (define_insn "sse2_cvtpd2pi" [(set (match_operand:V2SI 0 "register_operand" "=v,?!y") - (unspec:V2SI [(match_operand:V2DF 1 "nonimmediate_operand" "vBm,xm")] + (unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm,xBm")] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE2" "@ @@ -5523,7 +5523,7 @@ (define_insn "sse2_cvttpd2pi" [(set (match_operand:V2SI 0 "register_operand" "=v,?!y") - (fix:V2SI (match_operand:V2DF 1 "nonimmediate_operand" "vBm,xm")))] + (fix:V2SI (match_operand:V2DF 1 "vector_operand" "vBm,xBm")))] "TARGET_SSE2" "@ * return TARGET_AVX ? \"vcvttpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvttpd2dq\t{%1, %0|%0, %1}\"; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ed07047a984..a1fbb04a997 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-06-28 Jan Beulich + + * gcc.target/i386/cvtpd2pi: New. + 2019-06-27 Jakub Jelinek PR c++/91024