From: Sebastien Bourdeauducq Date: Wed, 8 Feb 2012 18:26:56 +0000 (+0100) Subject: doc: update Bank description X-Git-Tag: 24jan2021_ls180~2099^2~1036 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c1bff38861db7641536086746c1c0c05ed919b67;p=litex.git doc: update Bank description --- diff --git a/doc/migen.txt b/doc/migen.txt index 54a2e1f4..f8f97180 100644 --- a/doc/migen.txt +++ b/doc/migen.txt @@ -390,7 +390,7 @@ Migen Bank ========== Migen Bank is a system comparable to wishbone-gen [6], which automates the creation of configuration and status register banks and -(TODO) interrupt/event managers implemented in cores. +interrupt/event managers implemented in cores. Bank takes a description made up of a list of registers and generates logic implementing it with a slave interface compatible with Migen Bus. @@ -399,11 +399,11 @@ A register can be "raw", which means that the core has direct access to it. It also means that the register width must be less or equal to the bus word width. In that case, the register object provides the following signals: - - dev_r, which contains the data written from the bus interface. - - dev_re, which is the strobe signal for dev_r. It is active for one - cycle, after or during a write from the bus. dev_r is only valid when - dev_re is high. - - dev_w, which must provide at all times the value to be read from the + - r, which contains the data written from the bus interface. + - re, which is the strobe signal for r. It is active for one cycle, + after or during a write from the bus. r is only valid when re is + high. + - w, which must provide at all times the value to be read from the bus. Registers that are not raw are managed by Bank and contain fields. If the @@ -413,14 +413,14 @@ maximum size and implemented at consecutive bus addresses, MSB first. Field objects have two parameters, access_bus and access_dev, determining respectively the access policies for the bus and core sides. They can take the values READ_ONLY, WRITE_ONLY and READ_WRITE. -If the device can read, the field object provides the dev_r signal, which +If the device can read, the field object provides the r signal, which contains at all times the current value of the field (kept by the logic generated by Bank). If the device can write, the field object provides the following signals: - - dev_w, which provides the value to be written into the field. - - dev_we, which strobes the value into the field. + - w, which provides the value to be written into the field. + - we, which strobes the value into the field. -Migen Flow (TODO) +Migen Flow (Work in progress) ========== Many hardware acceleration problems can be expressed in the dataflow paradigm, that is, using a directed graph representing the flow of data