From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Sun, 5 Jul 2015 10:31:52 +0000 (+0200)
Subject: liteeth: small logic optimizations on mac (eases timings on spartan6)
X-Git-Tag: 24jan2021_ls180~2214
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c1ca928ec2be415f818b194c34e50f90130b83e2;p=litex.git

liteeth: small logic optimizations on mac (eases timings on spartan6)
---

diff --git a/misoclib/com/liteeth/core/mac/core/crc.py b/misoclib/com/liteeth/core/mac/core/crc.py
index ba7c5319..f08302b1 100644
--- a/misoclib/com/liteeth/core/mac/core/crc.py
+++ b/misoclib/com/liteeth/core/mac/core/crc.py
@@ -258,15 +258,14 @@ class LiteEthMACCRCChecker(Module):
             fifo.reset.eq(1),
             NextState("IDLE"),
         )
+        self.comb += crc.data.eq(sink.data)
         fsm.act("IDLE",
-            crc.data.eq(sink.data),
             If(sink.stb & sink.sop & sink.ack,
                 crc.ce.eq(1),
                 NextState("COPY")
             )
         )
         fsm.act("COPY",
-            crc.data.eq(sink.data),
             If(sink.stb & sink.ack,
                 crc.ce.eq(1),
                 If(sink.eop,
diff --git a/misoclib/com/liteeth/core/mac/core/preamble.py b/misoclib/com/liteeth/core/mac/core/preamble.py
index 18e86f83..b761a673 100644
--- a/misoclib/com/liteeth/core/mac/core/preamble.py
+++ b/misoclib/com/liteeth/core/mac/core/preamble.py
@@ -41,8 +41,13 @@ class LiteEthMACPreambleInserter(Module):
                 inc_cnt.eq(self.source.ack)
             )
         )
+
+        self.comb += [
+            self.source.data.eq(self.sink.data),
+            self.source.last_be.eq(self.sink.last_be)
+        ]
         fsm.act("COPY",
-            Record.connect(self.sink, self.source),
+            Record.connect(self.sink, self.source, leave_out=["data", "last_be"]),
             self.source.sop.eq(0),
 
             If(self.sink.stb & self.sink.eop & self.source.ack,
@@ -130,8 +135,12 @@ class LiteEthMACPreambleChecker(Module):
                 )
             )
         )
+        self.comb += [
+            self.source.data.eq(self.sink.data),
+            self.source.last_be.eq(self.sink.last_be)
+        ]
         fsm.act("COPY",
-            Record.connect(self.sink, self.source),
+            Record.connect(self.sink, self.source, leave_out=["data", "last_be"]),
             self.source.sop.eq(sop),
             clr_sop.eq(self.source.stb & self.source.ack),