From: Jan Beulich Date: Thu, 22 Jul 2021 11:08:39 +0000 (+0200) Subject: x86: drop xmm_m{b,w,d,q}_mode X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c1d66d5f24eb54a6453b3a813cbc7a7e0b5d15fe;p=binutils-gdb.git x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode. --- diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h index a1cd69a1c9e..7a372ce8c0b 100644 --- a/opcodes/i386-dis-evex-mod.h +++ b/opcodes/i386-dis-evex-mod.h @@ -1,28 +1,28 @@ { /* MOD_EVEX_0F12_PREFIX_0 */ - { "vmovlpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE }, + { "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE }, { VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) }, }, { /* MOD_EVEX_0F12_PREFIX_2 */ - { "vmovlpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE }, + { "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE }, }, { /* MOD_EVEX_0F13 */ - { "vmovlpX", { EXxmm_mq, XMM }, PREFIX_OPCODE }, + { "vmovlpX", { EXq, XMM }, PREFIX_OPCODE }, }, { /* MOD_EVEX_0F16_PREFIX_0 */ - { "vmovhpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE }, + { "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE }, { VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) }, }, { /* MOD_EVEX_0F16_PREFIX_2 */ - { "vmovhpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE }, + { "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE }, }, { /* MOD_EVEX_0F17 */ - { "vmovhpX", { EXxmm_mq, XMM }, PREFIX_OPCODE }, + { "vmovhpX", { EXq, XMM }, PREFIX_OPCODE }, }, { /* MOD_EVEX_0F2B */ diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 9ad9372a221..417eb1bfbff 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -111,16 +111,16 @@ /* PREFIX_EVEX_0F78 */ { { VEX_W_TABLE (EVEX_W_0F78_P_0) }, - { "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 }, + { "vcvttss2usi", { Gdq, EXd, EXxEVexS }, 0 }, { VEX_W_TABLE (EVEX_W_0F78_P_2) }, - { "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 }, + { "vcvttsd2usi", { Gdq, EXq, EXxEVexS }, 0 }, }, /* PREFIX_EVEX_0F79 */ { { VEX_W_TABLE (EVEX_W_0F79_P_0) }, - { "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 }, + { "vcvtss2usi", { Gdq, EXd, EXxEVexR }, 0 }, { VEX_W_TABLE (EVEX_W_0F79_P_2) }, - { "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 }, + { "vcvtsd2usi", { Gdq, EXq, EXxEVexR }, 0 }, }, /* PREFIX_EVEX_0F7A */ { diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index 8af4695a004..cb27d96d30d 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -1,11 +1,11 @@ /* EVEX_W_0F10_P_1 */ { - { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 }, + { "vmovss", { XMScalar, VexScalarR, EXd }, 0 }, }, /* EVEX_W_0F10_P_3 */ { { Bad_Opcode }, - { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 }, + { "vmovsd", { XMScalar, VexScalarR, EXq }, 0 }, }, /* EVEX_W_0F11_P_1 */ { @@ -18,7 +18,7 @@ }, /* EVEX_W_0F12_P_0_M_1 */ { - { "vmovhlps", { XMM, Vex, EXxmm_mq }, 0 }, + { "vmovhlps", { XMM, Vex, EXq }, 0 }, }, /* EVEX_W_0F12_P_1 */ { @@ -39,30 +39,30 @@ }, /* EVEX_W_0F51_P_1 */ { - { "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, + { "vsqrtss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, }, /* EVEX_W_0F51_P_3 */ { { Bad_Opcode }, - { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, + { "vsqrtsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, }, /* EVEX_W_0F58_P_1 */ { - { "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, + { "vaddss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, }, /* EVEX_W_0F58_P_3 */ { { Bad_Opcode }, - { "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, + { "vaddsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, }, /* EVEX_W_0F59_P_1 */ { - { "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, + { "vmulss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, }, /* EVEX_W_0F59_P_3 */ { { Bad_Opcode }, - { "vmulsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, + { "vmulsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, }, /* EVEX_W_0F5A_P_0 */ { @@ -70,7 +70,7 @@ }, /* EVEX_W_0F5A_P_1 */ { - { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, + { "vcvtss2sd", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 }, }, /* EVEX_W_0F5A_P_2 */ { @@ -80,7 +80,7 @@ /* EVEX_W_0F5A_P_3 */ { { Bad_Opcode }, - { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, + { "vcvtsd2ss", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, }, /* EVEX_W_0F5B_P_0 */ { @@ -97,39 +97,39 @@ }, /* EVEX_W_0F5C_P_1 */ { - { "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, + { "vsubss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, }, /* EVEX_W_0F5C_P_3 */ { { Bad_Opcode }, - { "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, + { "vsubsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, }, /* EVEX_W_0F5D_P_1 */ { - { "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, + { "vminss", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 }, }, /* EVEX_W_0F5D_P_3 */ { { Bad_Opcode }, - { "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 }, + { "vminsd", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 }, }, /* EVEX_W_0F5E_P_1 */ { - { "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 }, + { "vdivss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 }, }, /* EVEX_W_0F5E_P_3 */ { { Bad_Opcode }, - { "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 }, + { "vdivsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 }, }, /* EVEX_W_0F5F_P_1 */ { - { "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 }, + { "vmaxss", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 }, }, /* EVEX_W_0F5F_P_3 */ { { Bad_Opcode }, - { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 }, + { "vmaxsd", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 }, }, /* EVEX_W_0F62 */ { @@ -260,12 +260,12 @@ }, /* EVEX_W_0FC2_P_1 */ { - { "vcmpss", { MaskG, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 }, + { "vcmpss", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 }, }, /* EVEX_W_0FC2_P_3 */ { { Bad_Opcode }, - { "vcmpsd", { MaskG, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 }, + { "vcmpsd", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 }, }, /* EVEX_W_0FD2 */ { @@ -382,8 +382,8 @@ }, /* EVEX_W_0F3819_L_n */ { - { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA }, - { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA }, + { "vbroadcastf32x2", { XM, EXq }, PREFIX_DATA }, + { "vbroadcastsd", { XM, EXq }, PREFIX_DATA }, }, /* EVEX_W_0F381A_M_0_L_n */ { @@ -499,8 +499,8 @@ }, /* EVEX_W_0F3859 */ { - { "vbroadcasti32x2", { XM, EXxmm_mq }, PREFIX_DATA }, - { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA }, + { "vbroadcasti32x2", { XM, EXq }, PREFIX_DATA }, + { "vpbroadcastq", { XM, EXq }, PREFIX_DATA }, }, /* EVEX_W_0F385A_M_0_L_n */ { @@ -561,12 +561,12 @@ }, /* EVEX_W_0F3A0A */ { - { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, PREFIX_DATA }, + { "vrndscaless", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, PREFIX_DATA }, }, /* EVEX_W_0F3A0B */ { { Bad_Opcode }, - { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, PREFIX_DATA }, + { "vrndscalesd", { XMScalar, VexScalar, EXq, EXxEVexS, Ib }, PREFIX_DATA }, }, /* EVEX_W_0F3A18_L_n */ { diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index e750c94704a..27b6b8e8f44 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -352,6 +352,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EMd { OP_EM, d_mode } #define EMx { OP_EM, x_mode } #define EXbwUnit { OP_EX, bw_unit_mode } +#define EXb { OP_EX, b_mode } #define EXw { OP_EX, w_mode } #define EXd { OP_EX, d_mode } #define EXdS { OP_EX, d_swap_mode } @@ -364,10 +365,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EXtmm { OP_EX, tmm_mode } #define EXxmmq { OP_EX, xmmq_mode } #define EXEvexHalfBcstXmmq { OP_EX, evex_half_bcst_xmmq_mode } -#define EXxmm_mb { OP_EX, xmm_mb_mode } -#define EXxmm_mw { OP_EX, xmm_mw_mode } -#define EXxmm_md { OP_EX, xmm_md_mode } -#define EXxmm_mq { OP_EX, xmm_mq_mode } #define EXxmmdw { OP_EX, xmmdw_mode } #define EXxmmqd { OP_EX, xmmqd_mode } #define EXymmq { OP_EX, ymmq_mode } @@ -488,14 +485,6 @@ enum xmmq_mode, /* Same as xmmq_mode, but broadcast is allowed. */ evex_half_bcst_xmmq_mode, - /* XMM register or byte memory operand */ - xmm_mb_mode, - /* XMM register or word memory operand */ - xmm_mw_mode, - /* XMM register or double word memory operand */ - xmm_md_mode, - /* XMM register or quad word memory operand */ - xmm_mq_mode, /* 16-byte XMM, word, double word or quad word operand. */ xmmdw_mode, /* 16-byte XMM, double word, quad word operand or xmm word operand. */ @@ -3610,9 +3599,9 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F10 */ { { "vmovups", { XM, EXx }, 0 }, - { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 }, + { "vmovss", { XMScalar, VexScalarR, EXd }, 0 }, { "vmovupd", { XM, EXx }, 0 }, - { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 }, + { "vmovsd", { XMScalar, VexScalarR, EXq }, 0 }, }, /* PREFIX_VEX_0F11 */ @@ -3649,31 +3638,31 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F2C */ { { Bad_Opcode }, - { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS }, 0 }, + { "vcvttss2si", { Gdq, EXd, EXxEVexS }, 0 }, { Bad_Opcode }, - { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS }, 0 }, + { "vcvttsd2si", { Gdq, EXq, EXxEVexS }, 0 }, }, /* PREFIX_VEX_0F2D */ { { Bad_Opcode }, - { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR }, 0 }, + { "vcvtss2si", { Gdq, EXd, EXxEVexR }, 0 }, { Bad_Opcode }, - { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR }, 0 }, + { "vcvtsd2si", { Gdq, EXq, EXxEVexR }, 0 }, }, /* PREFIX_VEX_0F2E */ { - { "vucomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE }, + { "vucomisX", { XMScalar, EXd, EXxEVexS }, PREFIX_OPCODE }, { Bad_Opcode }, - { "vucomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE }, + { "vucomisX", { XMScalar, EXq, EXxEVexS }, PREFIX_OPCODE }, }, /* PREFIX_VEX_0F2F */ { - { "vcomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE }, + { "vcomisX", { XMScalar, EXd, EXxEVexS }, PREFIX_OPCODE }, { Bad_Opcode }, - { "vcomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE }, + { "vcomisX", { XMScalar, EXq, EXxEVexS }, PREFIX_OPCODE }, }, /* PREFIX_VEX_0F41_L_1_M_1_W_0 */ @@ -3789,45 +3778,45 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F51 */ { { "vsqrtps", { XM, EXx }, 0 }, - { "vsqrtss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vsqrtss", { XMScalar, VexScalar, EXd }, 0 }, { "vsqrtpd", { XM, EXx }, 0 }, - { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vsqrtsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F52 */ { { "vrsqrtps", { XM, EXx }, 0 }, - { "vrsqrtss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vrsqrtss", { XMScalar, VexScalar, EXd }, 0 }, }, /* PREFIX_VEX_0F53 */ { { "vrcpps", { XM, EXx }, 0 }, - { "vrcpss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vrcpss", { XMScalar, VexScalar, EXd }, 0 }, }, /* PREFIX_VEX_0F58 */ { { "vaddps", { XM, Vex, EXx }, 0 }, - { "vaddss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vaddss", { XMScalar, VexScalar, EXd }, 0 }, { "vaddpd", { XM, Vex, EXx }, 0 }, - { "vaddsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vaddsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F59 */ { { "vmulps", { XM, Vex, EXx }, 0 }, - { "vmulss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vmulss", { XMScalar, VexScalar, EXd }, 0 }, { "vmulpd", { XM, Vex, EXx }, 0 }, - { "vmulsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vmulsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F5A */ { { "vcvtps2pd", { XM, EXxmmq }, 0 }, - { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vcvtss2sd", { XMScalar, VexScalar, EXd }, 0 }, { "vcvtpd2ps%XY",{ XMM, EXx }, 0 }, - { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vcvtsd2ss", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F5B */ @@ -3840,33 +3829,33 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F5C */ { { "vsubps", { XM, Vex, EXx }, 0 }, - { "vsubss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vsubss", { XMScalar, VexScalar, EXd }, 0 }, { "vsubpd", { XM, Vex, EXx }, 0 }, - { "vsubsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vsubsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F5D */ { { "vminps", { XM, Vex, EXx }, 0 }, - { "vminss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vminss", { XMScalar, VexScalar, EXd }, 0 }, { "vminpd", { XM, Vex, EXx }, 0 }, - { "vminsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vminsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F5E */ { { "vdivps", { XM, Vex, EXx }, 0 }, - { "vdivss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vdivss", { XMScalar, VexScalar, EXd }, 0 }, { "vdivpd", { XM, Vex, EXx }, 0 }, - { "vdivsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vdivsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F5F */ { { "vmaxps", { XM, Vex, EXx }, 0 }, - { "vmaxss", { XMScalar, VexScalar, EXxmm_md }, 0 }, + { "vmaxss", { XMScalar, VexScalar, EXd }, 0 }, { "vmaxpd", { XM, Vex, EXx }, 0 }, - { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq }, 0 }, + { "vmaxsd", { XMScalar, VexScalar, EXq }, 0 }, }, /* PREFIX_VEX_0F6F */ @@ -4005,9 +3994,9 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0FC2 */ { { "vcmpps", { XM, Vex, EXx, CMP }, 0 }, - { "vcmpss", { XMScalar, VexScalar, EXxmm_md, CMP }, 0 }, + { "vcmpss", { XMScalar, VexScalar, EXd, CMP }, 0 }, { "vcmppd", { XM, Vex, EXx, CMP }, 0 }, - { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, CMP }, 0 }, + { "vcmpsd", { XMScalar, VexScalar, EXq, CMP }, 0 }, }, /* PREFIX_VEX_0FD0 */ @@ -6441,8 +6430,8 @@ static const struct dis386 vex_table[][256] = { /* 08 */ { "vroundps", { XM, EXx, Ib }, PREFIX_DATA }, { "vroundpd", { XM, EXx, Ib }, PREFIX_DATA }, - { "vroundss", { XMScalar, VexScalar, EXxmm_md, Ib }, PREFIX_DATA }, - { "vroundsd", { XMScalar, VexScalar, EXxmm_mq, Ib }, PREFIX_DATA }, + { "vroundss", { XMScalar, VexScalar, EXd, Ib }, PREFIX_DATA }, + { "vroundsd", { XMScalar, VexScalar, EXq, Ib }, PREFIX_DATA }, { "vblendps", { XM, Vex, EXx, Ib }, PREFIX_DATA }, { "vblendpd", { XM, Vex, EXx, Ib }, PREFIX_DATA }, { "vpblendw", { XM, Vex, EXx, Ib }, PREFIX_DATA }, @@ -6549,12 +6538,12 @@ static const struct dis386 vex_table[][256] = { /* 68 */ { "vfmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, { "vfmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, - { "vfmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA }, - { "vfmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA }, + { "vfmaddss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA }, + { "vfmaddsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA }, { "vfmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, { "vfmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, - { "vfmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA }, - { "vfmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA }, + { "vfmsubss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA }, + { "vfmsubsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA }, /* 70 */ { Bad_Opcode }, { Bad_Opcode }, @@ -6567,12 +6556,12 @@ static const struct dis386 vex_table[][256] = { /* 78 */ { "vfnmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, { "vfnmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, - { "vfnmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA }, - { "vfnmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA }, + { "vfnmaddss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA }, + { "vfnmaddsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA }, { "vfnmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, { "vfnmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA }, - { "vfnmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA }, - { "vfnmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA }, + { "vfnmsubss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA }, + { "vfnmsubsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA }, /* 80 */ { Bad_Opcode }, { Bad_Opcode }, @@ -6813,7 +6802,7 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F7E_P_1 */ { - { "vmovq", { XMScalar, EXxmm_mq }, 0 }, + { "vmovq", { XMScalar, EXq }, 0 }, }, /* VEX_LEN_0F7E_P_2 */ @@ -7533,11 +7522,11 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3818 */ - { "vbroadcastss", { XM, EXxmm_md }, PREFIX_DATA }, + { "vbroadcastss", { XM, EXd }, PREFIX_DATA }, }, { /* VEX_W_0F3819_L_1 */ - { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA }, + { "vbroadcastsd", { XM, EXq }, PREFIX_DATA }, }, { /* VEX_W_0F381A_M_0_L_1 */ @@ -7609,11 +7598,11 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3858 */ - { "vpbroadcastd", { XM, EXxmm_md }, PREFIX_DATA }, + { "vpbroadcastd", { XM, EXd }, PREFIX_DATA }, }, { /* VEX_W_0F3859 */ - { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA }, + { "vpbroadcastq", { XM, EXq }, PREFIX_DATA }, }, { /* VEX_W_0F385A_M_0_L_0 */ @@ -7641,11 +7630,11 @@ static const struct dis386 vex_w_table[][2] = { }, { /* VEX_W_0F3878 */ - { "vpbroadcastb", { XM, EXxmm_mb }, PREFIX_DATA }, + { "vpbroadcastb", { XM, EXb }, PREFIX_DATA }, }, { /* VEX_W_0F3879 */ - { "vpbroadcastw", { XM, EXxmm_mw }, PREFIX_DATA }, + { "vpbroadcastw", { XM, EXw }, PREFIX_DATA }, }, { /* VEX_W_0F38CF */ @@ -11107,66 +11096,6 @@ intel_operand_size (int bytemode, int sizeflag) abort (); } break; - case xmm_mb_mode: - if (!need_vex) - abort (); - - switch (vex.length) - { - case 128: - case 256: - case 512: - oappend ("BYTE PTR "); - break; - default: - abort (); - } - break; - case xmm_mw_mode: - if (!need_vex) - abort (); - - switch (vex.length) - { - case 128: - case 256: - case 512: - oappend ("WORD PTR "); - break; - default: - abort (); - } - break; - case xmm_md_mode: - if (!need_vex) - abort (); - - switch (vex.length) - { - case 128: - case 256: - case 512: - oappend ("DWORD PTR "); - break; - default: - abort (); - } - break; - case xmm_mq_mode: - if (!need_vex) - abort (); - - switch (vex.length) - { - case 128: - case 256: - case 512: - oappend ("QWORD PTR "); - break; - default: - abort (); - } - break; case xmmdw_mode: if (!need_vex) abort (); @@ -11424,19 +11353,18 @@ OP_E_memory (int bytemode, int sizeflag) { case dqw_mode: case dw_mode: - case xmm_mw_mode: + case w_mode: shift = 1; break; case dqb_mode: case db_mode: - case xmm_mb_mode: + case b_mode: shift = 0; break; case dq_mode: if (address_mode != mode_64bit) { case dqd_mode: - case xmm_md_mode: case d_mode: case d_swap_mode: shift = 2; @@ -11493,7 +11421,6 @@ OP_E_memory (int bytemode, int sizeflag) case xmm_mode: shift = 4; break; - case xmm_mq_mode: case q_mode: case q_swap_mode: shift = 3; @@ -12566,10 +12493,10 @@ print_vector_reg (unsigned int reg, int bytemode) && bytemode != scalar_mode && bytemode != xmmdw_mode && bytemode != xmmqd_mode - && bytemode != xmm_mb_mode - && bytemode != xmm_mw_mode - && bytemode != xmm_md_mode - && bytemode != xmm_mq_mode + && bytemode != b_mode + && bytemode != w_mode + && bytemode != d_mode + && bytemode != q_mode && bytemode != vex_scalar_w_dq_mode) { switch (vex.length)