From: Eric Anholt Date: Wed, 12 Jun 2013 00:32:41 +0000 (-0700) Subject: i965/gen4-5: Stop using bogus polygon_offset_scale field. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c20f973c4f8fa2c275e445b5da8deefcba874d2e;p=mesa.git i965/gen4-5: Stop using bogus polygon_offset_scale field. The polygon offset math used for triangles by the WM is "OffsetUnits * 2 * MRD + OffsetFactor * m" where 'MRD' is the minimum resolvable difference for the depth buffer (~1/(1<<16) or ~1/(1<<24)), 'm' is the approximated slope from the GL spec, and '2' is this magic number from the original i965 code dump that we deviate from the GL spec by because "it makes glean work" (except that it doesn't, because of some hilarity with 0.5 * approximately 2.0 != 1.0. go glean!). This clipper code for unfilled polygons, on the other hand, was doing "OffsetUnits * garbage + OffsetFactor * m", where garbage was MRD in the case of 16-bit depth visual (regardless the FBO's depth resolution), or 128 * MRD for 24-bit depth visual. This change just makes the unfilled polygons behavior match the WM's filled polygons behavior. Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 3baad86b08f..74d7e7e6539 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -216,7 +216,7 @@ brw_upload_clip_prog(struct brw_context *brw) if (offset_back || offset_front) { /* _NEW_POLYGON, _NEW_BUFFERS */ - key.offset_units = ctx->Polygon.OffsetUnits * brw->intel.polygon_offset_scale; + key.offset_units = ctx->Polygon.OffsetUnits * ctx->DrawBuffer->_MRD * 2; key.offset_factor = ctx->Polygon.OffsetFactor * ctx->DrawBuffer->_MRD; } diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index f669ae04ac8..23d8281b4ca 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -639,23 +639,6 @@ intelInitContext(struct intel_context *intel, intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24; intel->hw_stipple = 1; - /* XXX FBO: this doesn't seem to be used anywhere */ - switch (mesaVis->depthBits) { - case 0: /* what to do in this case? */ - case 16: - intel->polygon_offset_scale = 1.0; - break; - case 24: - intel->polygon_offset_scale = 2.0; /* req'd to pass glean */ - break; - default: - assert(0); - break; - } - - if (intel->gen >= 4) - intel->polygon_offset_scale /= 0xffff; - intel->RenderIndex = ~0; intelInitExtensions(ctx); diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index eac65ba5423..0f1a0c79e03 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -298,8 +298,6 @@ struct intel_context struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; GLuint vertex_attr_count; - GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */ - bool hw_stencil; bool hw_stipple; bool no_rast;