From: Brendan Kehoe Date: Tue, 30 Nov 1999 12:02:09 +0000 (+0000) Subject: sparc.h (MASK_FASTER_STRUCTS, [...]): Define. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c219ddf76d46bbea8a60dc8b261fd2b17d74f35a;p=gcc.git sparc.h (MASK_FASTER_STRUCTS, [...]): Define. * sparc.h (MASK_FASTER_STRUCTS, TARGET_FASTER_STRUCTS): Define. (TARGET_SWITCHES): Add -mfaster-structs/-mno-faster-structs flags. (ROUND_TYPE_ALIGN): Use better value of -mfaster-structs. * sparc.md (sparclite86x_branch, sparclite86x_shift): New function units for the sparclite86x chip. (flush): Revert October 14th change; add SImode specifically. (flushdi): Copy of flush, but DImode, to avoid genrecog warnings. * invoke.texi: Document it. From-SVN: r30722 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 052c3901241..9823098261f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +1999-11-30 Brendan Kehoe + + * sparc.h (MASK_FASTER_STRUCTS, TARGET_FASTER_STRUCTS): Define. + (TARGET_SWITCHES): Add -mfaster-structs/-mno-faster-structs flags. + (ROUND_TYPE_ALIGN): Use better value of -mfaster-structs. + * sparc.md (sparclite86x_branch, sparclite86x_shift): New function + units for the sparclite86x chip. + (flush): Revert October 14th change; add SImode specifically. + (flushdi): Copy of flush, but DImode, to avoid genrecog warnings. + * invoke.texi: Document it. + Tue Nov 30 14:58:14 1999 Nick Clifton * config/mn10200/mn10200.h (PREDICATE_CODES): Add diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 589a129e972..7d02de32def 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -545,6 +545,11 @@ extern int target_flags; #define MASK_V8PLUS 0x2000000 #define TARGET_V8PLUS (target_flags & MASK_V8PLUS) +/* Force a the fastest alignment on structures to take advantage of + faster copies. */ +#define MASK_FASTER_STRUCTS 0x4000000 +#define TARGET_FASTER_STRUCTS (target_flags & MASK_FASTER_STRUCTS) + /* TARGET_HARD_MUL: Use hardware multiply instructions but not %y. TARGET_HARD_MUL32: Use hardware multiply instructions with rd %y to get high 32 bits. False in V8+ or V9 because multiply stores @@ -603,6 +608,8 @@ extern int target_flags; {"64", MASK_64BIT, "Use 64-bit ABI" }, \ {"stack-bias", MASK_STACK_BIAS, "Use stack bias" }, \ {"no-stack-bias", -MASK_STACK_BIAS, "Do not use stack bias" }, \ + {"faster-structs", MASK_FASTER_STRUCTS, "Use structs on stronger alignment for double-word copies" }, \ + {"no-faster-structs", -MASK_FASTER_STRUCTS, "Do not use structs on stronger alignment for double-word copies" }, \ SUBTARGET_SWITCHES \ { "", TARGET_DEFAULT, ""}} @@ -799,6 +806,23 @@ if (TARGET_ARCH64 \ /* The best alignment to use in cases where we have a choice. */ #define FASTEST_ALIGNMENT 64 +/* Define this macro as an expression for the alignment of a structure + (given by STRUCT as a tree node) if the alignment computed in the + usual way is COMPUTED and the alignment explicitly specified was + SPECIFIED. + + The default is to use SPECIFIED if it is larger; otherwise, use + the smaller of COMPUTED and `BIGGEST_ALIGNMENT' */ +#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ + (TARGET_FASTER_STRUCTS ? \ + ((TREE_CODE (STRUCT) == RECORD_TYPE \ + || TREE_CODE (STRUCT) == UNION_TYPE \ + || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ + && TYPE_FIELDS (STRUCT) != 0 \ + ? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \ + : MAX ((COMPUTED), (SPECIFIED))) \ + : MAX ((COMPUTED), (SPECIFIED))) + /* Make strings word-aligned so strcpy from constants will be faster. */ #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ((TREE_CODE (EXP) == STRING_CST \ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index c15dbbe3076..90d86419faa 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -365,6 +365,17 @@ (eq_attr "type" "store,fpstore")) 2 1) +(define_function_unit "sparclite86x_branch" 1 0 + (and (eq_attr "cpu" "sparclite86x") + (eq_attr "type" "branch")) + 1 1) + +;; integer multiply insns +(define_function_unit "sparclite86x_shift" 1 0 + (and (eq_attr "cpu" "sparclite86x") + (eq_attr "type" "shift")) + 1 1) + (define_function_unit "fp_alu" 1 0 (and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x")) (eq_attr "type" "fp,fpmove,fpcmp")) @@ -7884,12 +7895,23 @@ ;; Special pattern for the FLUSH instruction. +; We do SImode and DImode versions of this to quiet down genrecog's complaints +; of the define_insn otherwise missing a mode. We make "flush", aka +; gen_flush, the default one since sparc_initialize_trampoline uses +; it on SImode mem values. + (define_insn "flush" - [(unspec_volatile [(mem (match_operand 0 "address_operand" "p"))] 4)] + [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] 3)] "" - "* return TARGET_V9 ? \"flush\\t%a0\" : \"iflush\\t%a0\";" - [(set_attr "type" "misc") - (set_attr "length" "1")]) + "* return TARGET_V9 ? \"flush %f0\" : \"iflush %f0\";" + [(set_attr "type" "misc")]) + +(define_insn "flushdi" + [(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] 3)] + "" + "* return TARGET_V9 ? \"flush %f0\" : \"iflush %f0\";" + [(set_attr "type" "misc")]) + ;; find first set. diff --git a/gcc/invoke.texi b/gcc/invoke.texi index 9da9537f170..567c2a2f092 100644 --- a/gcc/invoke.texi +++ b/gcc/invoke.texi @@ -231,11 +231,12 @@ in the following sections. -mtune=@var{cpu type} -mcmodel=@var{code model} -m32 -m64 --mapp-regs -mbroken-saverestore -mcypress -mepilogue --mflat -mfpu -mhard-float -mhard-quad-float --mimpure-text -mlive-g0 -mno-app-regs -mno-epilogue --mno-flat -mno-fpu -mno-impure-text --mno-stack-bias -mno-unaligned-doubles +-mapp-regs -mbroken-saverestore -mcypress +-mepilogue -mfaster-structs -mflat +-mfpu -mhard-float -mhard-quad-float +-mimpure-text -mlive-g0 -mno-app-regs +-mno-epilogue -mno-faster-structs -mno-flat -mno-fpu +-mno-impure-text -mno-stack-bias -mno-unaligned-doubles -msoft-float -msoft-quad-float -msparclite -mstack-bias -msupersparc -munaligned-doubles -mv8 @@ -3946,6 +3947,17 @@ Specifying this option avoids some rare compatibility problems with code generated by other compilers. It is not the default because it results in a performance loss, especially for floating point code. +@item -mno-faster-structs +@itemx -mfaster-structs +With @samp{-mfaster-structs}, the compiler assumes that structures +should have 8 byte alignment. This enables the use of pairs of +@code{ldd} and @code{std} instructions for copies in structure +assignment, in place of twice as many @code{ld} and @code{st} pairs. +However, the use of this changed alignment directly violates the Sparc +ABI. Thus, it's intended only for use on targets where the developer +acknowledges that their resulting code will not be directly in line with +the rules of the ABI. + @item -mv8 @itemx -msparclite These two options select variations on the SPARC architecture.