From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Fri, 13 Apr 2018 11:05:34 +0000 (+0100)
Subject: arch-arm: Fix Unknown Instruction disassemble
X-Git-Tag: v19.0.0.0~2145
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c21a2a54ca366c2e699571b1dddd083a77601831;p=gem5.git

arch-arm: Fix Unknown Instruction disassemble

Do not print the entire ExtMachInst when disassembling an Unknown
Instruction.

Change-Id: Icd5908ec0fa430090165b2426372bdeb43c2a155
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10062
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
---

diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index d4a2ba2d2..ef78c236e 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -324,5 +324,5 @@ RegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 std::string
 UnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
-    return csprintf("%-10s (inst %#08x)", "unknown", machInst);
+    return csprintf("%-10s (inst %#08x)", "unknown", machInst & mask(32));
 }
diff --git a/src/arch/arm/insts/misc64.cc b/src/arch/arm/insts/misc64.cc
index edc916dbb..5bdf6cb94 100644
--- a/src/arch/arm/insts/misc64.cc
+++ b/src/arch/arm/insts/misc64.cc
@@ -78,7 +78,7 @@ RegRegRegImmOp64::generateDisassembly(
 std::string
 UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
-    return csprintf("%-10s (inst %#08x)", "unknown", machInst);
+    return csprintf("%-10s (inst %#08x)", "unknown", machInst & mask(32));
 }
 
 std::string