From: Francisco Jerez Date: Wed, 4 Sep 2019 00:51:17 +0000 (-0700) Subject: intel/fs/gen12: Add codegen support for the SYNC instruction. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c22db5e1885ffbc4eb658bb27d3638749d425b03;p=mesa.git intel/fs/gen12: Add codegen support for the SYNC instruction. Reviewed-by: Caio Marcelo de Oliveira Filho Reviewed-by: Kenneth Graunke --- diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index 8476d090dd5..654246d7fdd 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -1080,6 +1080,8 @@ void brw_NOP(struct brw_codegen *p); void brw_WAIT(struct brw_codegen *p); +void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func); + /* Special case: there is never a destination, execution size will be * taken from src0: */ diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 7252e0cb4b1..21bf8a99923 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -1004,6 +1004,14 @@ enum PACKED brw_width { BRW_WIDTH_16 = 4, }; +enum tgl_sync_function { + TGL_SYNC_NOP = 0x0, + TGL_SYNC_ALLRD = 0x2, + TGL_SYNC_ALLWR = 0x3, + TGL_SYNC_BAR = 0xe, + TGL_SYNC_HOST = 0xf +}; + /** * Message target: Shared Function ID for where to SEND a message. * diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 7bbc5d30b98..e5d212bdba4 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -1271,9 +1271,11 @@ void brw_NOP(struct brw_codegen *p) brw_inst_set_opcode(p->devinfo, insn, BRW_OPCODE_NOP); } - - - +void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func) +{ + brw_inst *insn = next_insn(p, BRW_OPCODE_SYNC); + brw_inst_set_cond_modifier(p->devinfo, insn, func); +} /*********************************************************************** * Comparisons, if/else/endif diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 2f6309750bd..f19255f52d4 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1755,6 +1755,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, assert(inst->mlen <= BRW_MAX_MSG_LENGTH); switch (inst->opcode) { + case BRW_OPCODE_SYNC: + assert(src[0].file == BRW_IMMEDIATE_VALUE); + brw_SYNC(p, tgl_sync_function(src[0].ud)); + break; case BRW_OPCODE_MOV: brw_MOV(p, dst, src[0]); break;