From: Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Date: Wed, 22 Sep 2010 21:02:28 +0000 (-0700)
Subject: [sim] fixed bug in which shift operands were reversed
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c28cb729f9d63ce793fdfb2df0d068001cc6d66c;p=riscv-isa-sim.git

[sim] fixed bug in which shift operands were reversed
---

diff --git a/riscv/insns/sll.h b/riscv/insns/sll.h
index 59da49d..8b6bc70 100644
--- a/riscv/insns/sll.h
+++ b/riscv/insns/sll.h
@@ -1,2 +1,2 @@
 require64;
-RDR = RS2 << (RS1 & 0x3F);
+RDR = RS1 << (RS2 & 0x3F);
diff --git a/riscv/insns/sllw.h b/riscv/insns/sllw.h
index 3d96b0f..521c0f7 100644
--- a/riscv/insns/sllw.h
+++ b/riscv/insns/sllw.h
@@ -1 +1 @@
-RDR = sext32(RS2 << (RS1 & 0x1F));
+RDR = sext32(RS1 << (RS2 & 0x1F));
diff --git a/riscv/insns/sra.h b/riscv/insns/sra.h
index 6dfde0f..f0919ba 100644
--- a/riscv/insns/sra.h
+++ b/riscv/insns/sra.h
@@ -1,2 +1,2 @@
 require64;
-RDR = sreg_t(RS2) >> (RS1 & 0x3F);
+RDR = sreg_t(RS1) >> (RS2 & 0x3F);
diff --git a/riscv/insns/sraw.h b/riscv/insns/sraw.h
index 111f632..a49ead6 100644
--- a/riscv/insns/sraw.h
+++ b/riscv/insns/sraw.h
@@ -1 +1 @@
-RDR = sext32(sreg_t(RS2) >> (RS1 & 0x1F));
+RDR = sext32(sreg_t(RS1) >> (RS2 & 0x1F));
diff --git a/riscv/insns/srl.h b/riscv/insns/srl.h
index 1512be9..fa17eb7 100644
--- a/riscv/insns/srl.h
+++ b/riscv/insns/srl.h
@@ -1,2 +1,2 @@
 require64;
-RDR = RS2 >> (RS1 & 0x3F);
+RDR = RS1 >> (RS2 & 0x3F);
diff --git a/riscv/insns/srlw.h b/riscv/insns/srlw.h
index 2d9de89..7aa4bc6 100644
--- a/riscv/insns/srlw.h
+++ b/riscv/insns/srlw.h
@@ -1 +1 @@
-RDR = sext32((uint32_t)RS2 >> (RS1 & 0x1F));
+RDR = sext32((uint32_t)RS1 >> (RS2 & 0x1F));