From: Evandro Menezes Date: Mon, 15 Feb 2016 21:15:49 +0000 (+0000) Subject: Add support for the FCCMP insn types X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c297d256e364bf1a1448da25497cda331c755646;p=gcc.git Add support for the FCCMP insn types 2016-01-21 Evandro Menezes gcc/ * config/aarch64/aarch64.md (fccmp): Change insn type. (fccmpe): Likewise. * config/aarch64/thunderx.md (thunderx_fcmp): Add "fccmp{s,d}" types. * config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise. * config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise. * config/arm/xgene1.md (xgene1_fcmp): Likewise. * config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn reservation. * config/arm/types.md (fccmps): Add new insn type. (fccmpd): Likewise. From-SVN: r233432 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5858a5ef958..54e704226e6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +2016-02-15 Evandro Menezes + + Add support for the FCCMP insn types + + * config/aarch64/aarch64.md (fccmp): Change insn type. + (fccmpe): Likewise. + * config/aarch64/thunderx.md (thunderx_fcmp): Add "fccmp{s,d}" types. + * config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise. + * config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise. + * config/arm/xgene1.md (xgene1_fcmp): Likewise. + * config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn reservation. + * config/arm/types.md (fccmps): Add new insn type. + (fccmpd): Likewise. + 2016-02-15 Bernd Edlinger * alias.c (get_alias_set): Fix a typo in comment. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index b42f550d295..77bd191856a 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -302,7 +302,7 @@ (unspec:CCFP [(match_operand 5 "immediate_operand")] UNSPEC_NZCV)))] "TARGET_FLOAT" "fccmp\\t%2, %3, %k5, %m4" - [(set_attr "type" "fcmp")] + [(set_attr "type" "fccmp")] ) (define_insn "fccmpe" @@ -317,7 +317,7 @@ (unspec:CCFPE [(match_operand 5 "immediate_operand")] UNSPEC_NZCV)))] "TARGET_FLOAT" "fccmpe\\t%2, %3, %k5, %m4" - [(set_attr "type" "fcmp")] + [(set_attr "type" "fccmp")] ) ;; Expansion of signed mod by a power of 2 using CSNEG. diff --git a/gcc/config/aarch64/thunderx.md b/gcc/config/aarch64/thunderx.md index 922df390386..058713a2ad9 100644 --- a/gcc/config/aarch64/thunderx.md +++ b/gcc/config/aarch64/thunderx.md @@ -156,7 +156,7 @@ (define_insn_reservation "thunderx_fcmp" 3 (and (eq_attr "tune" "thunderx") - (eq_attr "type" "fcmps,fcmpd")) + (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd")) "thunderx_pipe1") (define_insn_reservation "thunderx_fmul" 6 diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md index c1eeedb72dd..fc60bc26c7c 100644 --- a/gcc/config/arm/cortex-a53.md +++ b/gcc/config/arm/cortex-a53.md @@ -508,8 +508,8 @@ (define_insn_reservation "cortex_a53_fpalu" 5 (and (eq_attr "tune" "cortexa53") (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, - f_cvt, fcmps, fcmpd, fcsel, f_rints, f_rintd, - f_minmaxs, f_minmaxd")) + f_cvt, fcmps, fcmpd, fccmps, fccmpd, fcsel, + f_rints, f_rintd, f_minmaxs, f_minmaxd")) "cortex_a53_slot_any,cortex_a53_fp_alu") (define_insn_reservation "cortex_a53_fconst" 3 diff --git a/gcc/config/arm/cortex-a57.md b/gcc/config/arm/cortex-a57.md index ca6cfc029a2..37912db4643 100644 --- a/gcc/config/arm/cortex-a57.md +++ b/gcc/config/arm/cortex-a57.md @@ -716,7 +716,7 @@ (define_insn_reservation "cortex_a57_fp_cmp" 7 (and (eq_attr "tune" "cortexa57") - (eq_attr "type" "fcmps,fcmpd")) + (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd")) "ca57_cx2") (define_insn_reservation "cortex_a57_fp_arith" 4 diff --git a/gcc/config/arm/exynos-m1.md b/gcc/config/arm/exynos-m1.md index 044807321fa..2f52b22fb50 100644 --- a/gcc/config/arm/exynos-m1.md +++ b/gcc/config/arm/exynos-m1.md @@ -823,6 +823,11 @@ (eq_attr "type" "fcmps, fcmpd")) "em1_nmisc") +(define_insn_reservation "exynos_m1_fp_ccmp" 7 + (and (eq_attr "tune" "exynosm1") + (eq_attr "type" "fccmps, fccmpd")) + "(em1_st, em1_nmisc)") + (define_insn_reservation "exynos_m1_fp_sel" 4 (and (eq_attr "tune" "exynosm1") (eq_attr "type" "fcsel")) diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md index 321ff898bd8..25f79b4d010 100644 --- a/gcc/config/arm/types.md +++ b/gcc/config/arm/types.md @@ -70,6 +70,7 @@ ; f_rint[d,s] double/single floating point rount to integral. ; f_store[d,s] double/single store to memory. Used for VFP unit. ; fadd[d,s] double/single floating-point scalar addition. +; fccmp[d,s] From ARMv8-A: floating-point conditional compare. ; fcmp[d,s] double/single floating-point compare. ; fconst[d,s] double/single load immediate. ; fcsel From ARMv8-A: Floating-point conditional select. @@ -582,6 +583,8 @@ f_stores,\ faddd,\ fadds,\ + fccmpd,\ + fccmps,\ fcmpd,\ fcmps,\ fconstd,\ diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md index 8dfd8a188b9..b7aeac69163 100644 --- a/gcc/config/arm/xgene1.md +++ b/gcc/config/arm/xgene1.md @@ -154,7 +154,7 @@ (define_insn_reservation "xgene1_fcmp" 10 (and (eq_attr "tune" "xgene1") - (eq_attr "type" "fcmpd,fcmps")) + (eq_attr "type" "fcmpd,fcmps,fccmpd,fccmps")) "xgene1_decode1op,xgene1_fsu+xgene1_fcmp*3") (define_insn_reservation "xgene1_fcsel" 3