From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Tue, 5 Apr 2016 04:46:07 +0000 (-0700)
Subject: Added GP_POR
X-Git-Tag: yosys-0.7~263^2~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c2b909c051edf189d6e1f807bb367c3c543dc058;p=yosys.git

Added GP_POR
---

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index d98526215..f013d9b71 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -153,3 +153,25 @@ module GP_BANDGAP(output reg OK, output reg VOUT);
 	//cannot simulate mixed signal IP
 	
 endmodule
+
+
+module GP_POR(output reg RST_DONE);
+	parameter POR_TIME = 500;
+	
+	initial begin
+		RST_DONE = 0;
+		
+		if(POR_TIME == 4)
+			#4000;
+		else if(POR_TIME == 500)
+			#500000;
+		else begin
+			$display("ERROR: bad POR_TIME for GP_POR cell");
+			$finish;
+		end
+		
+		RST_DONE = 1;
+		
+	end
+	
+endmodule