From: Keith Whitwell Date: Tue, 18 Dec 2007 17:25:33 +0000 (+0000) Subject: gallium: rationalize vertex_element state packet X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c31416971e4eac148f8e82d6c4392bd6f9cbc05d;p=mesa.git gallium: rationalize vertex_element state packet Remove dst_offset (not used) Add nr_components, which could be calculated from format, but would be too much effort. Update i965 driver to cope. --- diff --git a/src/mesa/pipe/i965simple/brw_context.h b/src/mesa/pipe/i965simple/brw_context.h index 11146570be7..fc2cb055e97 100644 --- a/src/mesa/pipe/i965simple/brw_context.h +++ b/src/mesa/pipe/i965simple/brw_context.h @@ -443,14 +443,6 @@ struct brw_cached_batch_item { */ #define ATTRIB_BIT_DWORDS ((PIPE_ATTRIB_MAX+31)/32) -struct brw_vertex_element { - struct brw_vertex_element_state vep; - - unsigned index; - unsigned element_size; - unsigned count; - unsigned vbo_rebase_offset; -}; @@ -508,7 +500,7 @@ struct brw_context */ struct pipe_vertex_buffer *vbo_array[PIPE_ATTRIB_MAX]; - struct brw_vertex_element inputs[PIPE_ATTRIB_MAX]; + struct brw_vertex_element_state inputs[PIPE_ATTRIB_MAX]; #define BRW_NR_UPLOAD_BUFS 17 #define BRW_UPLOAD_INIT_SIZE (128*1024) diff --git a/src/mesa/pipe/i965simple/brw_draw_upload.c b/src/mesa/pipe/i965simple/brw_draw_upload.c index 19626ca633c..88d6c9d1114 100644 --- a/src/mesa/pipe/i965simple/brw_draw_upload.c +++ b/src/mesa/pipe/i965simple/brw_draw_upload.c @@ -260,18 +260,8 @@ boolean brw_upload_vertex_elements( struct brw_context *brw ) memset(&vep, 0, sizeof(vep)); - for (i = 0; i < nr_enabled; i++) { - struct brw_vertex_element *input = &brw->vb.inputs[i]; - - switch (brw->vb.vbo_array[input->vep.ve0.vertex_buffer_index]->pitch) { - case 0: input->vep.ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_0; - case 1: input->vep.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_0; - case 2: input->vep.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_0; - case 3: input->vep.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_1_FLT; - break; - } - vep.ve[i] = input->vep; - } + for (i = 0; i < nr_enabled; i++) + vep.ve[i] = brw->vb.inputs[i]; vep.header.length = (1 + nr_enabled * sizeof(vep.ve[0])/4) - 2; diff --git a/src/mesa/pipe/i965simple/brw_state.c b/src/mesa/pipe/i965simple/brw_state.c index 20088536549..daf14ff4ff2 100644 --- a/src/mesa/pipe/i965simple/brw_state.c +++ b/src/mesa/pipe/i965simple/brw_state.c @@ -272,31 +272,27 @@ static void brw_set_vertex_element(struct pipe_context *pipe, struct brw_context *brw = brw_context(pipe); assert(index < PIPE_ATTRIB_MAX); - struct brw_vertex_element el; - memset(&el, 0, sizeof(struct brw_vertex_element)); - - /* do we need those anymore?*/ - el.index = index; -#if 0 - /*FIXME*/ - el.element_size = 0; - el.count = 0; - el.vbo_rebase_offset = 0; -#endif - - el.vep.ve0.src_offset = element->src_offset; - el.vep.ve0.src_format = brw_translate_surface_format(element->src_format); - el.vep.ve0.valid = 1; - el.vep.ve0.vertex_buffer_index = element->vertex_buffer_index; - - el.vep.ve1.dst_offset = index * 4; - el.vep.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_SRC; - el.vep.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_SRC; - el.vep.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_SRC; - el.vep.ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_SRC; - /*can we count of brw->vb.vbo_array[element->vertex_buffer_index] - * being initialized ok to actually compute vbcomponent's - * correctly? */ + struct brw_vertex_element_state el; + memset(&el, 0, sizeof(el)); + + el.ve0.src_offset = element->src_offset; + el.ve0.src_format = brw_translate_surface_format(element->src_format); + el.ve0.valid = 1; + el.ve0.vertex_buffer_index = element->vertex_buffer_index; + + el.ve1.dst_offset = index * 4; + + el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_SRC; + el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_SRC; + el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_SRC; + el.ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_SRC; + + switch (element->nr_components) { + case 1: el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_0; + case 2: el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_0; + case 3: el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_1_FLT; + break; + } brw->vb.inputs[index] = el; } diff --git a/src/mesa/pipe/p_state.h b/src/mesa/pipe/p_state.h index b7793c6d314..16d50fdb826 100644 --- a/src/mesa/pipe/p_state.h +++ b/src/mesa/pipe/p_state.h @@ -307,8 +307,8 @@ struct pipe_vertex_element * this attribute live in? */ unsigned vertex_buffer_index:5; - - unsigned dst_offset:8; + unsigned nr_components:3; + enum pipe_format src_format; /**< PIPE_FORMAT_* */ }; diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c index 274ae86a3ec..a3e061d6048 100644 --- a/src/mesa/state_tracker/st_draw.c +++ b/src/mesa/state_tracker/st_draw.c @@ -289,7 +289,7 @@ st_draw_vbo(GLcontext *ctx, vbuffer[attr].pitch = arrays[mesaAttr]->StrideB; /* in bytes */ vbuffer[attr].max_index = 0; /* need this? */ velement.vertex_buffer_index = attr; - velement.dst_offset = 0; /* need this? */ + velement.nr_components = arrays[mesaAttr]->Size; velement.src_format = pipe_vertex_format(arrays[mesaAttr]->Type, arrays[mesaAttr]->Size, arrays[mesaAttr]->Normalized); @@ -415,7 +415,7 @@ st_draw_vertices(GLcontext *ctx, unsigned prim, velement.src_offset = i * 4 * sizeof(GLfloat); velement.vertex_buffer_index = 0; velement.src_format = PIPE_FORMAT_R32G32B32A32_FLOAT; - velement.dst_offset = 0; + velement.nr_components = 4; pipe->set_vertex_element(pipe, i, &velement); } @@ -547,7 +547,7 @@ st_feedback_draw_vbo(GLcontext *ctx, vbuffer[attr].pitch = arrays[mesaAttr]->StrideB; /* in bytes */ vbuffer[attr].max_index = 0; /* need this? */ velement.vertex_buffer_index = attr; - velement.dst_offset = 0; /* need this? */ + velement.nr_components = arrays[mesaAttr]->Size; velement.src_format = pipe_vertex_format(arrays[mesaAttr]->Type, arrays[mesaAttr]->Size, arrays[mesaAttr]->Normalized);