From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 13 Dec 2019 22:44:07 +0000 (+0100)
Subject: soc/cores/cpu/minerva: add self.reset to i_rst
X-Git-Tag: 24jan2021_ls180~809
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c34255d2aba2680a029608f415ac49d39742ac4b;p=litex.git

soc/cores/cpu/minerva: add self.reset to i_rst
---

diff --git a/litex/soc/cores/cpu/minerva/core.py b/litex/soc/cores/cpu/minerva/core.py
index b353dcae..9cac00d8 100644
--- a/litex/soc/cores/cpu/minerva/core.py
+++ b/litex/soc/cores/cpu/minerva/core.py
@@ -48,7 +48,7 @@ class Minerva(CPU):
         self.cpu_params = dict(
             # clock / reset
             i_clk=ClockSignal(),
-            i_rst=ResetSignal(),
+            i_rst=ResetSignal() | self.reset,
 
             # interrupts
             i_timer_interrupt    = 0,