From: Eric Anholt Date: Sat, 6 Aug 2016 00:10:18 +0000 (-0700) Subject: nir: Add nir_builder support for individual system value loads. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c35f9792202c4450d19c5616e2a38b9e81e418fe;p=mesa.git nir: Add nir_builder support for individual system value loads. The previous nir_load_system_value(b, nir_intrinsic_load_whatever), 0) was rather verbose, when system values should be easy to generate. The index is left out because only one system value had an index included in it. Reviewed-by: Kenneth Graunke --- diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index affa29cb025..040f03ef9d3 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -465,6 +465,7 @@ nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src) nir_builder_instr_insert(build, ©->instr); } +/* Generic builder for system values. */ static inline nir_ssa_def * nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index) { @@ -477,6 +478,20 @@ nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index) return &load->dest.ssa; } +/* Generate custom builders for system values. */ +#define INTRINSIC(name, num_srcs, src_components, has_dest, dest_components, \ + num_variables, num_indices, idx0, idx1, idx2, flags) +#define LAST_INTRINSIC(name) + +#define DEFINE_SYSTEM_VALUE(name) \ + static inline nir_ssa_def * \ + nir_load_##name(nir_builder *build) \ + { \ + return nir_load_system_value(build, nir_intrinsic_load_##name, 0); \ + } \ + +#include "nir_intrinsics.h" + static inline nir_ssa_def * nir_load_barycentric(nir_builder *build, nir_intrinsic_op op, unsigned interp_mode) diff --git a/src/compiler/nir/nir_intrinsics.h b/src/compiler/nir/nir_intrinsics.h index d0f7f5db833..4cb04373e00 100644 --- a/src/compiler/nir/nir_intrinsics.h +++ b/src/compiler/nir/nir_intrinsics.h @@ -41,7 +41,6 @@ #define ARR(...) { __VA_ARGS__ } - INTRINSIC(load_var, 0, ARR(0), true, 0, 1, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) INTRINSIC(store_var, 1, ARR(0), false, 0, 1, 1, WRMASK, xx, xx, 0) INTRINSIC(copy_var, 0, ARR(0), false, 0, 2, 0, xx, xx, xx, 0) @@ -277,7 +276,13 @@ INTRINSIC(shared_atomic_xor, 2, ARR(1, 1), true, 1, 0, 1, BASE, xx, xx, 0) INTRINSIC(shared_atomic_exchange, 2, ARR(1, 1), true, 1, 0, 1, BASE, xx, xx, 0) INTRINSIC(shared_atomic_comp_swap, 3, ARR(1, 1, 1), true, 1, 0, 1, BASE, xx, xx, 0) +/* Used by nir_builder.h to generate loader helpers for the system values. */ +#ifndef DEFINE_SYSTEM_VALUE +#define DEFINE_SYSTEM_VALUE(name) +#endif + #define SYSTEM_VALUE(name, components, num_indices, idx0, idx1, idx2) \ + DEFINE_SYSTEM_VALUE(name) \ INTRINSIC(load_##name, 0, ARR(0), true, components, 0, num_indices, \ idx0, idx1, idx2, \ NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) @@ -406,5 +411,6 @@ STORE(shared, 2, 2, BASE, WRMASK, xx, 0) LAST_INTRINSIC(store_shared) +#undef DEFINE_SYSTEM_VALUE #undef INTRINSIC #undef LAST_INTRINSIC diff --git a/src/compiler/nir/nir_lower_system_values.c b/src/compiler/nir/nir_lower_system_values.c index 3ca8e082c46..9747ac473d3 100644 --- a/src/compiler/nir/nir_lower_system_values.c +++ b/src/compiler/nir/nir_lower_system_values.c @@ -62,10 +62,8 @@ convert_block(nir_block *block, nir_builder *b) local_size.u32[1] = b->shader->info.cs.local_size[1]; local_size.u32[2] = b->shader->info.cs.local_size[2]; - nir_ssa_def *group_id = - nir_load_system_value(b, nir_intrinsic_load_work_group_id, 0); - nir_ssa_def *local_id = - nir_load_system_value(b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *group_id = nir_load_work_group_id(b); + nir_ssa_def *local_id = nir_load_local_invocation_id(b); sysval = nir_iadd(b, nir_imul(b, group_id, nir_build_imm(b, 3, 32, local_size)), @@ -87,8 +85,7 @@ convert_block(nir_block *block, nir_builder *b) * gl_WorkGroupSize.y + gl_LocalInvocationID.y * * gl_WorkGroupSize.x + gl_LocalInvocationID.x" */ - nir_ssa_def *local_id = - nir_load_system_value(b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *local_id = nir_load_local_invocation_id(b); nir_ssa_def *size_x = nir_imm_int(b, b->shader->info.cs.local_size[0]); nir_ssa_def *size_y = nir_imm_int(b, b->shader->info.cs.local_size[1]); @@ -104,17 +101,17 @@ convert_block(nir_block *block, nir_builder *b) case SYSTEM_VALUE_VERTEX_ID: if (b->shader->options->vertex_id_zero_based) { sysval = nir_iadd(b, - nir_load_system_value(b, nir_intrinsic_load_vertex_id_zero_base, 0), - nir_load_system_value(b, nir_intrinsic_load_base_vertex, 0)); + nir_load_vertex_id_zero_base(b), + nir_load_base_vertex(b)); } else { - sysval = nir_load_system_value(b, nir_intrinsic_load_vertex_id, 0); + sysval = nir_load_vertex_id(b); } break; case SYSTEM_VALUE_INSTANCE_INDEX: sysval = nir_iadd(b, - nir_load_system_value(b, nir_intrinsic_load_instance_id, 0), - nir_load_system_value(b, nir_intrinsic_load_base_instance, 0)); + nir_load_instance_id(b), + nir_load_base_instance(b)); break; default: diff --git a/src/compiler/nir/nir_lower_two_sided_color.c b/src/compiler/nir/nir_lower_two_sided_color.c index 5bb95f66e72..7d1a3bd236d 100644 --- a/src/compiler/nir/nir_lower_two_sided_color.c +++ b/src/compiler/nir/nir_lower_two_sided_color.c @@ -154,9 +154,7 @@ nir_lower_two_sided_color_block(nir_block *block, * bcsel(load_system_value(FACE), load_input(COLn), load_input(BFCn)) */ b->cursor = nir_before_instr(&intr->instr); - nir_ssa_def *face = nir_load_system_value(b, - nir_intrinsic_load_front_face, - 0); + nir_ssa_def *face = nir_load_front_face(b); nir_ssa_def *front = load_input(b, state->colors[idx].front); nir_ssa_def *back = load_input(b, state->colors[idx].back); nir_ssa_def *color = nir_bcsel(b, face, front, back); diff --git a/src/mesa/drivers/dri/i965/blorp_blit.c b/src/mesa/drivers/dri/i965/blorp_blit.c index edbd726fb6b..a4b3fe0e5b1 100644 --- a/src/mesa/drivers/dri/i965/blorp_blit.c +++ b/src/mesa/drivers/dri/i965/blorp_blit.c @@ -106,7 +106,7 @@ blorp_blit_get_frag_coords(nir_builder *b, if (key->persample_msaa_dispatch) { return nir_vec3(b, nir_channel(b, coord, 0), nir_channel(b, coord, 1), - nir_load_system_value(b, nir_intrinsic_load_sample_id, 0)); + nir_load_sample_id(b)); } else { return nir_vec2(b, nir_channel(b, coord, 0), nir_channel(b, coord, 1)); } diff --git a/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c b/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c index 00155fbaffb..059d14d0e4f 100644 --- a/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c +++ b/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c @@ -82,8 +82,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, * cs_thread_local_id + channel_num; */ nir_ssa_def *thread_local_id = read_thread_local_id(state); - nir_ssa_def *channel = - nir_load_system_value(b, nir_intrinsic_load_channel_num, 0); + nir_ssa_def *channel = nir_load_channel_num(b); sysval = nir_iadd(b, channel, thread_local_id); break; } @@ -105,8 +104,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, */ unsigned *size = nir->info.cs.local_size; - nir_ssa_def *local_index = - nir_load_system_value(b, nir_intrinsic_load_local_invocation_index, 0); + nir_ssa_def *local_index = nir_load_local_invocation_index(b); nir_const_value uvec3; uvec3.u32[0] = 1;