From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 16 Feb 2022 14:20:19 +0000 (+0000)
Subject: remove minerva cpu
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c37b0245fcf55c64afdb09a0fe38360635e765a8;p=ls2.git

remove minerva cpu
---

diff --git a/src/ls2.py b/src/ls2.py
index 78e4399..a904ee7 100644
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -15,7 +15,6 @@ from nmigen_soc.memory import MemoryMap
 
 from nmigen_stdio.serial import AsyncSerial
 
-from lambdasoc.cpu.minerva import MinervaCPU
 from lambdasoc.periph.intc import GenericInterruptController
 from lambdasoc.periph.sram import SRAMPeripheral
 from lambdasoc.periph.timer import TimerPeripheral