From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 25 Jul 2012 12:27:50 +0000 (-0400)
Subject: radeon/llvm: Add i1 registers for SI.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c424975572af2edd46863e5bb9fe3c51c96b4f9b;p=mesa.git

radeon/llvm: Add i1 registers for SI.
---

diff --git a/src/gallium/drivers/radeon/SIISelLowering.cpp b/src/gallium/drivers/radeon/SIISelLowering.cpp
index 79400851470..23eb4f8e239 100644
--- a/src/gallium/drivers/radeon/SIISelLowering.cpp
+++ b/src/gallium/drivers/radeon/SIISelLowering.cpp
@@ -27,6 +27,8 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
   addRegisterClass(MVT::f32, &AMDGPU::VReg_32RegClass);
   addRegisterClass(MVT::i32, &AMDGPU::VReg_32RegClass);
   addRegisterClass(MVT::i64, &AMDGPU::VReg_64RegClass);
+  addRegisterClass(MVT::i1, &AMDGPU::SCCRegRegClass);
+  addRegisterClass(MVT::i1, &AMDGPU::VCCRegRegClass);
 
   addRegisterClass(MVT::v4i32, &AMDGPU::SReg_128RegClass);
   addRegisterClass(MVT::v8i32, &AMDGPU::SReg_256RegClass);