From: lkcl <lkcl@web>
Date: Sun, 21 Aug 2022 13:21:04 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~811
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c4a0832949243dbe7c9eb49f566bee347999d298;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 0f65bd84c..3c7a34456 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -292,6 +292,12 @@ Indexed LD is:
 
 Note in both cases that [[sv/svp64]] allows RA-as-a-dest in "update" mode (`ldux`) to be effectively a *completely different* register from RA-as-a-source.  This because there is room in svp64 to extend RA-as-src as well as RA-as-dest, both independently as scalar or vector *and* independently extending their range.
 
+*Programmer's note: being able to set RA-as-a-source to Vector
+ but RA-as-a-destination as Scalar is **extremely valuable**
+ once it is remembered that Simple-V element operations must
+ be in Program Order. What that means is that the very last
+ update to RA will *
+
 # LD/ST Indexed vs Indexed REMAP
 
 Unfortunately the word "Indexed" is used twice in completely different