From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 15 Jul 2020 13:28:12 +0000 (+0100)
Subject: comments on SPRmap done in PowerDecode2
X-Git-Tag: div_pipeline~28
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c4e2d8fdcae08f5c66b5a4795294f64b5fc6304b;p=soc.git

comments on SPRmap done in PowerDecode2
---

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 3f5686ba..deb04863 100644
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -319,7 +319,7 @@ class DecodeOut(Elaboratable):
                             comb += self.fast_out.ok.eq(1)
                         with m.Case(SPR.XER.value):
                             pass # do nothing
-                        # XXX TODO: map to internal SPR numbers
+                        # : map to internal SPR numbers
                         # XXX TODO: dec and tb not to go through mapping.
                         with m.Default():
                             comb += sprmap.spr_i.eq(spr)