From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 15 Jul 2020 13:41:35 +0000 (+0100)
Subject: move FPPipeContext to concurrentunit: rename to PipeContext
X-Git-Tag: 24jan2021_ls180~37
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c56a985ee89c38652a0ad38b94624bc6fc62840e;p=nmutil.git

move FPPipeContext to concurrentunit: rename to PipeContext
see https://bugs.libre-soc.org/show_bug.cgi?id=431
---

diff --git a/src/nmutil/concurrentunit.py b/src/nmutil/concurrentunit.py
index 05dd2a6..7e89646 100644
--- a/src/nmutil/concurrentunit.py
+++ b/src/nmutil/concurrentunit.py
@@ -20,6 +20,29 @@ from nmutil.multipipe import PriorityCombMuxInPipe
 def num_bits(n):
     return int(log(n) / log(2))
 
+class PipeContext:
+
+    def __init__(self, pspec):
+        """ creates a pipeline context.  currently: operator (op) and muxid
+
+            opkls (within pspec) - the class to create that will be the
+                                   "operator". instance must have an "eq"
+                                   function.
+        """
+        self.id_wid = pspec.id_wid
+        self.op_wid = pspec.op_wid
+        self.muxid = Signal(self.id_wid, reset_less=True)   # RS multiplex ID
+        opkls = pspec.opkls
+        if opkls is None:
+            self.op = Signal(self.op_wid, reset_less=True)
+        else:
+            self.op = opkls(pspec)
+
+    def eq(self, i):
+        ret = [self.muxid.eq(i.muxid)]
+        ret.append(self.op.eq(i.op))
+        return ret
+
 
 class InMuxPipe(PriorityCombMuxInPipe):
     def __init__(self, num_rows, iospecfn, maskwid=0):