From: lkcl <lkcl@web>
Date: Tue, 22 Dec 2020 23:20:50 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~1028
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c5cae0ada6be896bf5886a2e8e0f6950cb1dec1d;p=libreriscv.git

---

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index c2f54e56c..b7533981f 100644
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -73,6 +73,10 @@ Example
 TODO: a Vector CR-based version of the same, due to CRs being used for predication. This would use the same testing mechanism as branch: BO[0:2]
 where bit 2 is inv, bits 0:1 select the bit of the CR.
 
+
+     def test_CR_bit(CR, BO):
+         return CR[BO[0:1]] == BO[2]
+
      def iotacr(RT, BA, BO): 
         mask = get_src_predicate()
         count = 0