From: Alan Modra Date: Fri, 7 Jul 2017 14:19:42 +0000 (+0930) Subject: Make ppc476 testcases more robust X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c620a2b5471b9158e9e0da176e098ce3f4335b1f;p=binutils-gdb.git Make ppc476 testcases more robust * testsuite/ld-powerpc/ppc476-shared.lnk: Align .bss. * testsuite/ld-powerpc/ppc476-shared.d: Adjust. * testsuite/ld-powerpc/ppc476-shared2.d: Adjust. --- diff --git a/ld/ChangeLog b/ld/ChangeLog index be3310011d9..cb72710ed87 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,9 @@ +2017-07-07 Alan Modra + + * testsuite/ld-powerpc/ppc476-shared.lnk: Align .bss. + * testsuite/ld-powerpc/ppc476-shared.d: Adjust. + * testsuite/ld-powerpc/ppc476-shared2.d: Adjust. + 2017-07-07 Alan Modra * Makefile.am (eelf64_s390.c): Depend on emultempl/s390.em. diff --git a/ld/testsuite/ld-powerpc/ppc476-shared.d b/ld/testsuite/ld-powerpc/ppc476-shared.d index fe438f40f42..72f8a3d3beb 100644 --- a/ld/testsuite/ld-powerpc/ppc476-shared.d +++ b/ld/testsuite/ld-powerpc/ppc476-shared.d @@ -23,7 +23,7 @@ Disassembly of section \.text: \.\.\. 3fff0: (42 9f 00 05|05 00 9f 42) bcl .* 3fff4: (7d 28 02 a6|a6 02 28 7d) mflr r9 - 3fff8: (3d 29 00 00|00 00 29 3d) addis r9,r9,0 + 3fff8: (3d 29 00 01|01 00 29 3d) addis r9,r9,1 3fff[8a]: R_PPC_REL16_HA \.bss\+0x[46] 3fffc: (48 00 00 34|34 00 00 48) b 40030 .* 40000: (3c 60 00 00|00 00 60 3c) lis r3,0 @@ -41,7 +41,7 @@ Disassembly of section \.text: 40024: (4b fe ff dc|dc ff fe 4b) b 30000 .* 40028: (48 00 00 02|02 00 00 48) ba 0 .* 4002c: (48 00 00 02|02 00 00 48) ba 0 .* - 40030: (39 29 01 50|50 01 29 39) addi r9,r9,336 + 40030: (39 29 00 0c|0c 00 29 39) addi r9,r9,12 4003[02]: R_PPC_REL16_LO \.bss\+0x3[ce] 40034: (4b ff ff cc|cc ff ff 4b) b 40000 .* 40038: (48 00 00 02|02 00 00 48) ba 0 .* diff --git a/ld/testsuite/ld-powerpc/ppc476-shared.lnk b/ld/testsuite/ld-powerpc/ppc476-shared.lnk index 5339358dbdf..03e66b335e1 100644 --- a/ld/testsuite/ld-powerpc/ppc476-shared.lnk +++ b/ld/testsuite/ld-powerpc/ppc476-shared.lnk @@ -2,5 +2,5 @@ SECTIONS { . = 0xfffc; .text : { *(.text) } - .bss : { *(.bss) } + .bss : ALIGN (0x10000) { *(.bss) } } diff --git a/ld/testsuite/ld-powerpc/ppc476-shared2.d b/ld/testsuite/ld-powerpc/ppc476-shared2.d index 813ea2eccc9..5bf0a035cfd 100644 --- a/ld/testsuite/ld-powerpc/ppc476-shared2.d +++ b/ld/testsuite/ld-powerpc/ppc476-shared2.d @@ -8,9 +8,9 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE -0001000[02] R_PPC_ADDR16_LO \.text\+0x00040144 -0002000[02] R_PPC_ADDR16_LO \.text\+0x00040144 -0003000[02] R_PPC_ADDR16_LO \.text\+0x00040144 -0004000[02] R_PPC_ADDR16_HA \.text\+0x00040144 -0004001[02] R_PPC_ADDR16_HA \.text\+0x00040144 -0004002[02] R_PPC_ADDR16_HA \.text\+0x00040144 +0001000[02] R_PPC_ADDR16_LO \.text\+0x00050000 +0002000[02] R_PPC_ADDR16_LO \.text\+0x00050000 +0003000[02] R_PPC_ADDR16_LO \.text\+0x00050000 +0004000[02] R_PPC_ADDR16_HA \.text\+0x00050000 +0004001[02] R_PPC_ADDR16_HA \.text\+0x00050000 +0004002[02] R_PPC_ADDR16_HA \.text\+0x00050000